[PATCH 0/2] dra72: add support for PCIE 2 lane mode

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From	Kishon Vijay Abraham I <kishon@ti.com>
Newsgroups	linux.kernel
Subject	[PATCH 0/2] dra72: add support for PCIE 2 lane mode
Date	Wed, 06 Jan 2016 12:00:05 +0100
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dra72 reuse the USB PHY for the PCIe 2n lane. So in order for PCIe x2 mode
to work in dra72, certain special configuration has to be made in
USB PHY. This patch series adds those configurations.

In order to enable PCIe x2 mode in DRA72, USB should be disabled.

Certain board modifications has to be done in order to test
x2 mode in dra72-evm.

Patch series is rebased on top of linux-phy next

Kishon Vijay Abraham I (2):
  phy: ti-pipe3: get tx and rx MEM resource
  phy: ti-pipe3: configure usb3 phy to be used as pcie phy

 Documentation/devicetree/bindings/phy/ti-phy.txt |    2 +
 drivers/phy/phy-ti-pipe3.c                       |   57 +++++++++++++++++++++-
 2 files changed, 58 insertions(+), 1 deletion(-)

-- 
1.7.9.5

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[PATCH 0/2] dra72: add support for PCIE 2 lane mode Kishon Vijay Abraham I <kishon@ti.com> - 2016-01-06 12:00 +0100
  [PATCH 2/2] phy: ti-pipe3: configure usb3 phy to be used as pcie phy Kishon Vijay Abraham I <kishon@ti.com> - 2016-01-06 12:00 +0100
    Re: [PATCH 2/2] phy: ti-pipe3: configure usb3 phy to be used as pcie  phy Rob Herring <robh@kernel.org> - 2016-01-06 14:30 +0100
  [PATCH 1/2] phy: ti-pipe3: get tx and rx MEM resource Kishon Vijay Abraham I <kishon@ti.com> - 2016-01-06 12:10 +0100

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