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Re: [PATCH 2/2] phy: ti-pipe3: configure usb3 phy to be used as pcie phy

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On Wed, Jan 06, 2016 at 04:29:08PM +0530, Kishon Vijay Abraham I wrote:
> DRA72 uses USB3 PHY for the 2nd lane of PCIE. The configuration
> required to make USB3 PHY used for the 2nd lane of PCIe is done
> here.
> 
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
>  Documentation/devicetree/bindings/phy/ti-phy.txt |    2 ++
>  drivers/phy/phy-ti-pipe3.c                       |   30 +++++++++++++++++++++-
>  2 files changed, 31 insertions(+), 1 deletion(-)

Acked-by: Rob Herring <robh@kernel.org>
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Thread

[PATCH 0/2] dra72: add support for PCIE 2 lane mode Kishon Vijay Abraham I <kishon@ti.com> - 2016-01-06 12:00 +0100
  [PATCH 2/2] phy: ti-pipe3: configure usb3 phy to be used as pcie phy Kishon Vijay Abraham I <kishon@ti.com> - 2016-01-06 12:00 +0100
    Re: [PATCH 2/2] phy: ti-pipe3: configure usb3 phy to be used as pcie  phy Rob Herring <robh@kernel.org> - 2016-01-06 14:30 +0100
  [PATCH 1/2] phy: ti-pipe3: get tx and rx MEM resource Kishon Vijay Abraham I <kishon@ti.com> - 2016-01-06 12:10 +0100

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