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Groups > linux.kernel > #1294666
| From | Mark Rutland <mark.rutland@arm.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH v10 3/4] irqchip:create irq domain for each mbigen device |
| Date | 2015-12-18 12:10 +0100 |
| Message-ID | <qH157-4PE-1@gated-at.bofh.it> (permalink) |
| References | <qGFxD-7Gb-7@gated-at.bofh.it> <qGFHk-7JC-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Thu, Dec 17, 2015 at 07:56:36PM +0800, MaJun wrote:
> From: Ma Jun <majun258@huawei.com>
>
> For peripheral devices which connect to mbigen,mbigen is a interrupt
> controller. So, we create irq domain for each mbigen device and add
> mbigen irq domain into irq hierarchy structure.
>
> Signed-off-by: Ma Jun <majun258@huawei.com>
> ---
> drivers/irqchip/irq-mbigen.c | 138 ++++++++++++++++++++++++++++++++++++++++++
> 1 files changed, 138 insertions(+), 0 deletions(-)
[...]
> +static int mbigen_domain_translate(struct irq_domain *d,
> + struct irq_fwspec *fwspec,
> + unsigned long *hwirq,
> + unsigned int *type)
> +{
> + if (is_of_node(fwspec->fwnode)) {
> + if (fwspec->param_count != 2)
> + return -EINVAL;
> +
> + if ((fwspec->param[0] > MAXIMUM_IRQ_PIN_NUM) ||
> + (fwspec->param[0] < RESERVED_IRQ_PER_MBIGEN_CHIP))
> + return -EINVAL;
> + else
> + *hwirq = fwspec->param[0];
> +
> + /* If there is no valid irq type, just use the default type */
> + if ((fwspec->param[1] == IRQ_TYPE_EDGE_RISING) ||
> + (fwspec->param[1] == IRQ_TYPE_LEVEL_HIGH))
> + *type = fwspec->param[1];
> + else
> + *type = IRQ_TYPE_NONE;
That does not seem like a good idea. The binding requires one of two
types, and the DT is clearly wrong in the else case.
I think for the else case we should return -EINVAL.
Thanks,
Mark.
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[PATCH v10 0/4] irqchip:support mbigen interrupt controller MaJun <majun258@huawei.com> - 2015-12-17 13:10 +0100
[PATCH v10 4/4] irqchip:implement the mbigen irq chip operation functions MaJun <majun258@huawei.com> - 2015-12-17 13:10 +0100
Re: [PATCH v10 4/4] irqchip:implement the mbigen irq chip operation functions Marc Zyngier <marc.zyngier@arm.com> - 2015-12-17 17:10 +0100
[PATCH v10 2/4] irqchip: add platform device driver for mbigen device MaJun <majun258@huawei.com> - 2015-12-17 13:10 +0100
[PATCH v10 1/4] dt-binding:Documents of the mbigen bindings MaJun <majun258@huawei.com> - 2015-12-17 13:10 +0100
Re: [PATCH v10 1/4] dt-binding:Documents of the mbigen bindings Mark Rutland <mark.rutland@arm.com> - 2015-12-17 15:00 +0100
Re: [PATCH v10 1/4] dt-binding:Documents of the mbigen bindings "majun (F)" <majun258@huawei.com> - 2015-12-18 03:00 +0100
Re: [PATCH v10 1/4] dt-binding:Documents of the mbigen bindings Mark Rutland <mark.rutland@arm.com> - 2015-12-18 12:00 +0100
Re: [PATCH v10 1/4] dt-binding:Documents of the mbigen bindings Marc Zyngier <marc.zyngier@arm.com> - 2015-12-18 12:30 +0100
Re: [PATCH v10 1/4] dt-binding:Documents of the mbigen bindings Marc Zyngier <marc.zyngier@arm.com> - 2015-12-18 12:40 +0100
Re: [PATCH v10 1/4] dt-binding:Documents of the mbigen bindings Mark Rutland <mark.rutland@arm.com> - 2015-12-18 13:00 +0100
[PATCH v10 3/4] irqchip:create irq domain for each mbigen device MaJun <majun258@huawei.com> - 2015-12-17 13:20 +0100
Re: [PATCH v10 3/4] irqchip:create irq domain for each mbigen device Marc Zyngier <marc.zyngier@arm.com> - 2015-12-17 17:10 +0100
Re: [PATCH v10 3/4] irqchip:create irq domain for each mbigen device Mark Rutland <mark.rutland@arm.com> - 2015-12-18 12:10 +0100
Re: [PATCH v10 3/4] irqchip:create irq domain for each mbigen device Marc Zyngier <marc.zyngier@arm.com> - 2015-12-18 12:30 +0100
Re: [PATCH v10 0/4] irqchip:support mbigen interrupt controller Marc Zyngier <marc.zyngier@arm.com> - 2015-12-17 17:10 +0100
Re: [PATCH v10 0/4] irqchip:support mbigen interrupt controller Marc Zyngier <marc.zyngier@arm.com> - 2015-12-18 13:00 +0100
Re: [PATCH v10 0/4] irqchip:support mbigen interrupt controller Hanjun Guo <guohanjun@huawei.com> - 2015-12-18 13:40 +0100
Re: [PATCH v10 0/4] irqchip:support mbigen interrupt controller majun <majun258@huawei.com> - 2015-12-18 15:10 +0100
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