Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1287108
| From | Krzysztof Kozlowski <k.kozlowski@samsung.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 2/2] ARM: dts: exynos542x: add GSCL block parent clock management to pm domain |
| Date | 2015-12-09 06:00 +0100 |
| Message-ID | <qDF18-3C2-9@gated-at.bofh.it> (permalink) |
| References | <qDqOu-30G-15@gated-at.bofh.it> <qDqOu-30G-27@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On 08.12.2015 22:46, Marek Szyprowski wrote: > Add support for restoring GScaler parent clocks configuration when GSCL > power domain is turned on. > > Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> > --- > arch/arm/boot/dts/exynos5420.dtsi | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi > index 48a0a55..912143e 100644 > --- a/arch/arm/boot/dts/exynos5420.dtsi > +++ b/arch/arm/boot/dts/exynos5420.dtsi > @@ -252,8 +252,10 @@ > compatible = "samsung,exynos4210-pd"; > reg = <0x10044000 0x20>; > #power-domain-cells = <0>; > - clocks = <&clock CLK_GSCL0>, <&clock CLK_GSCL1>; > - clock-names = "asb0", "asb1"; > + clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_SW_ACLK300_GSCL>, > + <&clock CLK_MOUT_USER_ACLK300_GSCL>, <&clock CLK_GSCL0>, > + <&clock CLK_GSCL1>; > + clock-names = "oscclk", "pclk0", "clk0", "asb0", "asb1"; The pclkN name is not used. Best regards, Krzysztof -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Back to linux.kernel | Previous | Next — Previous in thread | Next in thread | Find similar | Unroll thread
[PATCH 1/2] clk: samsung: exynos5422: add missing parent GSCL block clocks Marek Szyprowski <m.szyprowski@samsung.com> - 2015-12-08 14:50 +0100
[PATCH 2/2] ARM: dts: exynos542x: add GSCL block parent clock management to pm domain Marek Szyprowski <m.szyprowski@samsung.com> - 2015-12-08 14:50 +0100
Re: [PATCH 2/2] ARM: dts: exynos542x: add GSCL block parent clock management to pm domain Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2015-12-09 06:00 +0100
[PATCH v2 2/2] ARM: dts: exynos542x: add GSCL block parent clock management to pm domain Marek Szyprowski <m.szyprowski@samsung.com> - 2015-12-09 09:10 +0100
Re: [PATCH v2 2/2] ARM: dts: exynos542x: add GSCL block parent clock management to pm domain Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2015-12-09 14:40 +0100
Re: [PATCH 1/2] clk: samsung: exynos5422: add missing parent GSCL block clocks Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2015-12-09 06:00 +0100
Re: [PATCH 1/2] clk: samsung: exynos5422: add missing parent GSCL block clocks Sylwester Nawrocki <s.nawrocki@samsung.com> - 2015-12-09 11:20 +0100
Re: [PATCH 1/2] clk: samsung: exynos5422: add missing parent GSCL block clocks Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2015-12-09 14:40 +0100
csiph-web