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Re: [PATCH 00/13] mvneta Buffer Management and enhancements

From Marcin Wojtas <mw@semihalf.com>
Newsgroups linux.kernel
Subject Re: [PATCH 00/13] mvneta Buffer Management and enhancements
Date 2015-12-02 23:20 +0100
Message-ID <qBnUK-4LF-19@gated-at.bofh.it> (permalink)
References (3 earlier) <qAT0C-1GT-33@gated-at.bofh.it> <qB0Y9-6H7-1@gated-at.bofh.it> <qB2GC-7Ot-7@gated-at.bofh.it> <qBd90-60F-19@gated-at.bofh.it> <qBis3-19N-31@gated-at.bofh.it>
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Hi Gregory,

2015-12-02 17:21 GMT+01:00 Gregory CLEMENT <gregory.clement@free-electrons.com>:
> Hi,
>
>  On mer., déc. 02 2015, Gregory CLEMENT <gregory.clement@free-electrons.com> wrote:
>
>>>
>>> So far the issue may have been not noticed, because in every IO driver
>>> using mvebu_mbus_dram_info for configuring MBUS windows, there's
>>> following substraction:
>>> (cs->size - 1) & 0xfffff000
>>>
>>> I think there are two options:
>>> 1. Change size type to u64.
>>
>> If we switch to u64 we really must pay attention to be sure that it
>> won't be used to be written in a register, but the regsiter remains
>> 32bits.
>>
>>> 2. Change condition in mvebu_mbus_get_dram_win_info to:
>>> if (cs->base <= phyaddr && phyaddr <= (cs->base + cs->size -1))
>>
>> I think it would be the best solution.
>
> So I applied the following patch:
> --- a/drivers/bus/mvebu-mbus.c
> +++ b/drivers/bus/mvebu-mbus.c
> @@ -964,7 +964,7 @@ int mvebu_mbus_get_dram_win_info(phys_addr_t phyaddr, u8 *target, u8 *attr)
>         for (i = 0; i < dram->num_cs; i++) {
>                 const struct mbus_dram_window *cs = dram->cs + i;
>
> -               if (cs->base <= phyaddr && phyaddr <= (cs->base + cs->size)) {
> +               if (cs->base <= phyaddr && phyaddr <= (cs->base + cs->size - 1)) {
>                         *target = dram->mbus_dram_target_id;
>                         *attr = cs->mbus_attr;
>                         return 0;
>
> I didn't get any errors during boot related to the BM. However I did not
> manage to use an ethernet interface. The udhcpc never managed to get an
> IP and if I set the IP manually I could not ping.
>
> But on Armada 388 GP I didn't have any issue.
>
> Do you have some idea about waht I could check?
>

I replaced 2GB with 8GB DIMM and after that, on the same kernel/board,
I can't ping either. Very strange, but as I can reproduce the issue,
don't debug it, I will.

Best regards,
Marcin
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Thread

Re: [PATCH 00/13] mvneta Buffer Management and enhancements Gregory CLEMENT <gregory.clement@free-electrons.com> - 2015-11-30 18:20 +0100
  Re: [PATCH 00/13] mvneta Buffer Management and enhancements Marcin Wojtas <mw@semihalf.com> - 2015-11-30 21:00 +0100
    Re: [PATCH 00/13] mvneta Buffer Management and enhancements Gregory CLEMENT <gregory.clement@free-electrons.com> - 2015-12-01 14:20 +0100
      Re: [PATCH 00/13] mvneta Buffer Management and enhancements Marcin Wojtas <mw@semihalf.com> - 2015-12-01 22:50 +0100
        Re: [PATCH 00/13] mvneta Buffer Management and enhancements Marcin Wojtas <mw@semihalf.com> - 2015-12-02 00:40 +0100
          Re: [PATCH 00/13] mvneta Buffer Management and enhancements Gregory CLEMENT <gregory.clement@free-electrons.com> - 2015-12-02 11:50 +0100
            Re: [PATCH 00/13] mvneta Buffer Management and enhancements Gregory CLEMENT <gregory.clement@free-electrons.com> - 2015-12-02 17:30 +0100
              Re: [PATCH 00/13] mvneta Buffer Management and enhancements Marcin Wojtas <mw@semihalf.com> - 2015-12-02 23:20 +0100
                Re: [PATCH 00/13] mvneta Buffer Management and enhancements Gregory CLEMENT <gregory.clement@free-electrons.com> - 2015-12-03 00:00 +0100

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