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Groups > linux.kernel > #1283382

[PATCH V6 05/26] coresight: etm3x: implementing 'cpu_id()' API

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Other than plainly parsing the device tree there is no way to
know which CPU a tracer is affined to.  As such adding an
interface to lookup the CPU field enclosed in the etm_drvdata
structure that was initialised at boot time.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
 drivers/hwtracing/coresight/coresight-etm3x.c | 8 ++++++++
 include/linux/coresight.h                     | 3 +++
 2 files changed, 11 insertions(+)

diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c
index b30add73c0ae..9dd88cf8f15c 100644
--- a/drivers/hwtracing/coresight/coresight-etm3x.c
+++ b/drivers/hwtracing/coresight/coresight-etm3x.c
@@ -312,6 +312,13 @@ static void etm_enable_hw(void *info)
 	dev_dbg(drvdata->dev, "cpu: %d enable smp call done\n", drvdata->cpu);
 }
 
+static int etm_cpu_id(struct coresight_device *csdev)
+{
+	struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+
+	return drvdata->cpu;
+}
+
 int etm_get_trace_id(struct etm_drvdata *drvdata)
 {
 	unsigned long flags;
@@ -439,6 +446,7 @@ static void etm_disable(struct coresight_device *csdev)
 }
 
 static const struct coresight_ops_source etm_source_ops = {
+	.cpu_id		= etm_cpu_id,
 	.trace_id	= etm_trace_id,
 	.enable		= etm_enable,
 	.disable	= etm_disable,
diff --git a/include/linux/coresight.h b/include/linux/coresight.h
index a7cabfa23b55..bf62b265bf52 100644
--- a/include/linux/coresight.h
+++ b/include/linux/coresight.h
@@ -205,12 +205,15 @@ struct coresight_ops_link {
 /**
  * struct coresight_ops_source - basic operations for a source
  * Operations available for sources.
+ * @cpu_id:	returns the value of the CPU number this component
+ *		is associated to.
  * @trace_id:	returns the value of the component's trace ID as known
 		to the HW.
  * @enable:	enables tracing for a source.
  * @disable:	disables tracing for a source.
  */
 struct coresight_ops_source {
+	int (*cpu_id)(struct coresight_device *csdev);
 	int (*trace_id)(struct coresight_device *csdev);
 	int (*enable)(struct coresight_device *csdev);
 	void (*disable)(struct coresight_device *csdev);
-- 
2.1.4

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Thread

[PATCH V6 00/26] Coresight integration with perf Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-03 22:10 +0100
  [PATCH V6 26/26] perf tools: adding coresight etm PMU record capabilities Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-03 22:10 +0100
  [PATCH V6 08/26] coresight: etm3x: adding operation mode for etm_enable() Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-03 22:20 +0100
  [PATCH V6 11/26] coresight: etm3x: changing default trace configuration Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-03 22:20 +0100
  [PATCH V6 18/26] coresight: etb10: implementing AUX space API Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-03 22:20 +0100
    Re: [PATCH V6 18/26] coresight: etb10: implementing AUX space API Alexander Shishkin <alexander.shishkin@linux.intel.com> - 2015-12-11 15:10 +0100
      Re: [PATCH V6 18/26] coresight: etb10: implementing AUX space API Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-11 22:20 +0100
  [PATCH V6 03/26] coresight: etm3x: unlocking tracers in default arch init Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-03 22:20 +0100
  [PATCH V6 07/26] coresight: moving PM runtime operations to core framework Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-03 22:20 +0100
  [PATCH V6 05/26] coresight: etm3x: implementing 'cpu_id()' API Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-03 22:20 +0100
  [PATCH V6 09/26] coresight: add API to get sink from path Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-03 22:20 +0100
  [PATCH V6 01/26] coresight: etm3x: moving etm_readl/writel to header file Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-03 22:20 +0100
  [PATCH V6 14/26] coresight: etm3x: adding perf_get/set_config() API Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-03 22:20 +0100
  [PATCH V6 17/26] coresight: adding operation mode for sink->enable() Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-03 22:20 +0100
  [PATCH V6 06/26] coresight: associating path with session rather than tracer Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-03 22:20 +0100
  [PATCH V6 13/26] coresight: etm3x: implementing user/kernel mode tracing Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-03 22:20 +0100
  Re: [PATCH V6 00/26] Coresight integration with perf Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-08 21:30 +0100
    Re: [PATCH V6 00/26] Coresight integration with perf Arnaldo Carvalho de Melo <acme@kernel.org> - 2015-12-08 21:40 +0100
      Re: [PATCH V6 00/26] Coresight integration with perf Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-10 22:30 +0100
  Re: [PATCH V6 00/26] Coresight integration with perf Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-08 21:30 +0100

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