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Groups > linux.kernel > #1283386
| From | Mathieu Poirier <mathieu.poirier@linaro.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH V6 14/26] coresight: etm3x: adding perf_get/set_config() API |
| Date | 2015-12-03 22:20 +0100 |
| Message-ID | <qBJse-1YU-27@gated-at.bofh.it> (permalink) |
| References | <qBJix-1Vy-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Adding a source operation to build a tracer's configuration from
a perf_event. That way possibly complex parsing of the information
conveyed by the event doesn't have to be carried out every time
the configuration is needed.
Since event configuration can change between concurrent sessions,
the possibility of associating a tracer with a configuration is
also provided. As such Perf can assign session configuration to
tracers as it see fit.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
drivers/hwtracing/coresight/Kconfig | 1 +
drivers/hwtracing/coresight/coresight-etm3x.c | 70 +++++++++++++++++++++++++++
include/linux/coresight.h | 9 +++-
3 files changed, 79 insertions(+), 1 deletion(-)
diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig
index 6c8921140f02..e252dd1522e5 100644
--- a/drivers/hwtracing/coresight/Kconfig
+++ b/drivers/hwtracing/coresight/Kconfig
@@ -4,6 +4,7 @@
menuconfig CORESIGHT
bool "CoreSight Tracing Support"
select ARM_AMBA
+ select PERF_EVENTS
help
This framework provides a kernel interface for the CoreSight debug
and trace drivers to register themselves with. It's intended to build
diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c
index d0b77be51980..cda28e0211f5 100644
--- a/drivers/hwtracing/coresight/coresight-etm3x.c
+++ b/drivers/hwtracing/coresight/coresight-etm3x.c
@@ -31,6 +31,7 @@
#include <linux/seq_file.h>
#include <linux/uaccess.h>
#include <linux/clk.h>
+#include <linux/perf_event.h>
#include <asm/sections.h>
#include "coresight-etm.h"
@@ -315,6 +316,40 @@ void etm_config_trace_mode(struct etm_drvdata *drvdata,
config->addr_type[1] = ETM_ADDR_TYPE_RANGE;
}
+#define ETM3X_SUPPORTED_OPTIONS (ETMCR_CYC_ACC | ETMCR_TIMESTAMP_EN)
+
+static int etm_parse_event_config(struct etm_drvdata *drvdata,
+ struct etm_config *config,
+ struct perf_event *event)
+{
+ u32 mode = 0;
+ u64 event_config = event->attr.config;
+
+ if (event->attr.exclude_kernel)
+ mode = ETM_MODE_EXCL_KERN;
+
+ if (event->attr.exclude_user)
+ mode = ETM_MODE_EXCL_USER;
+
+ /*
+ * By default the tracers are configured to trace the whole address
+ * range. Narrow the field only if requested by user space.
+ */
+ if (mode)
+ etm_config_trace_mode(drvdata, config, mode);
+
+ /*
+ * At this time only cycle accurate and timestamp options are
+ * available.
+ */
+ if (event_config & ~ETM3X_SUPPORTED_OPTIONS)
+ return -EINVAL;
+
+ config->ctrl = event_config;
+
+ return 0;
+}
+
static void etm_enable_hw(void *info)
{
int i;
@@ -428,6 +463,38 @@ static int etm_trace_id(struct coresight_device *csdev)
return etm_get_trace_id(drvdata);
}
+static void *etm_get_config(struct coresight_device *csdev,
+ struct perf_event *event)
+{
+ struct etm_config *config = NULL;
+ struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+
+ config = kzalloc(sizeof(struct etm_config), GFP_KERNEL);
+ if (!config)
+ return config;
+
+ etm_set_default(config);
+
+ if (etm_parse_event_config(drvdata, config, event))
+ return ERR_PTR(-EINVAL);
+
+ return config;
+}
+
+static void etm_put_config(void *config)
+{
+ struct etm_config *cfg = config;
+
+ kfree(cfg);
+}
+
+static void etm_set_config(struct coresight_device *csdev, void *config)
+{
+ struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+
+ drvdata->config = config;
+}
+
static int etm_enable_sysfs(struct coresight_device *csdev)
{
struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
@@ -569,6 +636,9 @@ static void etm_disable(struct coresight_device *csdev)
static const struct coresight_ops_source etm_source_ops = {
.cpu_id = etm_cpu_id,
.trace_id = etm_trace_id,
+ .get_config = etm_get_config,
+ .put_config = etm_put_config,
+ .set_config = etm_set_config,
.enable = etm_enable,
.disable = etm_disable,
};
diff --git a/include/linux/coresight.h b/include/linux/coresight.h
index 61dfb8d511ea..da242dfebdbd 100644
--- a/include/linux/coresight.h
+++ b/include/linux/coresight.h
@@ -206,13 +206,20 @@ struct coresight_ops_link {
* @cpu_id: returns the value of the CPU number this component
* is associated to.
* @trace_id: returns the value of the component's trace ID as known
- to the HW.
+ * to the HW.
+ * @get_config: builds the ETM configuration after events' specifics.
+ * @put_config: release memory allocated in @get_config.
+ * @set_config: associate a tracer with a configuration.
* @enable: enables tracing for a source.
* @disable: disables tracing for a source.
*/
struct coresight_ops_source {
int (*cpu_id)(struct coresight_device *csdev);
int (*trace_id)(struct coresight_device *csdev);
+ void *(*get_config)(struct coresight_device *csdev,
+ struct perf_event *event);
+ void (*put_config)(void *config);
+ void (*set_config)(struct coresight_device *csdev, void *config);
int (*enable)(struct coresight_device *csdev, u32 mode);
void (*disable)(struct coresight_device *csdev);
};
--
2.1.4
--
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[PATCH V6 00/26] Coresight integration with perf Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-03 22:10 +0100
[PATCH V6 26/26] perf tools: adding coresight etm PMU record capabilities Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-03 22:10 +0100
[PATCH V6 08/26] coresight: etm3x: adding operation mode for etm_enable() Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-03 22:20 +0100
[PATCH V6 11/26] coresight: etm3x: changing default trace configuration Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-03 22:20 +0100
[PATCH V6 18/26] coresight: etb10: implementing AUX space API Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-03 22:20 +0100
Re: [PATCH V6 18/26] coresight: etb10: implementing AUX space API Alexander Shishkin <alexander.shishkin@linux.intel.com> - 2015-12-11 15:10 +0100
Re: [PATCH V6 18/26] coresight: etb10: implementing AUX space API Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-11 22:20 +0100
[PATCH V6 03/26] coresight: etm3x: unlocking tracers in default arch init Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-03 22:20 +0100
[PATCH V6 07/26] coresight: moving PM runtime operations to core framework Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-03 22:20 +0100
[PATCH V6 05/26] coresight: etm3x: implementing 'cpu_id()' API Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-03 22:20 +0100
[PATCH V6 09/26] coresight: add API to get sink from path Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-03 22:20 +0100
[PATCH V6 01/26] coresight: etm3x: moving etm_readl/writel to header file Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-03 22:20 +0100
[PATCH V6 14/26] coresight: etm3x: adding perf_get/set_config() API Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-03 22:20 +0100
[PATCH V6 17/26] coresight: adding operation mode for sink->enable() Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-03 22:20 +0100
[PATCH V6 06/26] coresight: associating path with session rather than tracer Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-03 22:20 +0100
[PATCH V6 13/26] coresight: etm3x: implementing user/kernel mode tracing Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-03 22:20 +0100
Re: [PATCH V6 00/26] Coresight integration with perf Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-08 21:30 +0100
Re: [PATCH V6 00/26] Coresight integration with perf Arnaldo Carvalho de Melo <acme@kernel.org> - 2015-12-08 21:40 +0100
Re: [PATCH V6 00/26] Coresight integration with perf Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-10 22:30 +0100
Re: [PATCH V6 00/26] Coresight integration with perf Mathieu Poirier <mathieu.poirier@linaro.org> - 2015-12-08 21:30 +0100
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