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Re: [PATCH v2 2/2] perf/x86: enable cycles:pp for Intel Atom

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On Thu, Dec 3, 2015 at 12:14 PM, Andi Kleen <ak@linux.intel.com> wrote:
>
> >       /* INST_RETIRED.ANY_P, inv=1, cmask=16 (cycles:p). */
> >       INTEL_FLAGS_EVENT_CONSTRAINT(0x108000c0, 0x01),
> > +     /* Allow all events as PEBS with no flags */
> > +     INTEL_ALL_EVENT_CONSTRAINT(0, 0x1),
>
> I don't think this is really needed (no extra PEBS events), but ok it shouldn't
> hurt either.
>
Has to do with consistent behavior. Do not get an error if trying PEBS
on non-PEBS
event, like for the other CPUs.
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[PATCH v2 0/2] perf/x86: fixes and improvement for Intel Atom PEBS support Stephane Eranian <eranian@google.com> - 2015-12-03 21:10 +0100
  [PATCH v2 2/2] perf/x86: enable cycles:pp for Intel Atom Stephane Eranian <eranian@google.com> - 2015-12-03 21:10 +0100
    Re: [PATCH v2 2/2] perf/x86: enable cycles:pp for Intel Atom Andi Kleen <ak@linux.intel.com> - 2015-12-03 21:20 +0100
      Re: [PATCH v2 2/2] perf/x86: enable cycles:pp for Intel Atom Stephane Eranian <eranian@google.com> - 2015-12-03 22:50 +0100
  [PATCH v2 1/2] perf/x86: fix PEBS and LBR issues on Intel Atom Stephane Eranian <eranian@google.com> - 2015-12-03 21:10 +0100
    Re: [PATCH v2 1/2] perf/x86: fix PEBS and LBR issues on Intel Atom Peter Zijlstra <peterz@infradead.org> - 2015-12-03 22:00 +0100
      Re: [PATCH v2 1/2] perf/x86: fix PEBS and LBR issues on Intel Atom Andi Kleen <ak@linux.intel.com> - 2015-12-03 22:30 +0100

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