Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]


Groups > linux.kernel > #1283302

[PATCH v2 2/2] perf/x86: enable cycles:pp for Intel Atom

From Stephane Eranian <eranian@google.com>
Newsgroups linux.kernel
Subject [PATCH v2 2/2] perf/x86: enable cycles:pp for Intel Atom
Date 2015-12-03 21:10 +0100
Message-ID <qBImt-1jF-11@gated-at.bofh.it> (permalink)
References <qBImt-1jF-5@gated-at.bofh.it>
Organization linux.* mail to news gateway

Show all headers | View raw


This patch updates the PEBS support for Intel Atom to provide
an alias for the cycles:pp event used by perf record/top by default
nowadays.

On Atom,  only INST_RETIRED:ANY supports PEBS, so we use this event
instead with a large cmask to count cycles. Given that Core2 has
the same issue, we use the intel_pebs_aliases_core2() function for Atom
as well.

Signed-off-by: Stephane Eranian <eranian@google.com>
---
 arch/x86/kernel/cpu/perf_event_intel.c    | 1 +
 arch/x86/kernel/cpu/perf_event_intel_ds.c | 2 ++
 2 files changed, 3 insertions(+)

diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 61f2577..cef4d2f 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -3332,6 +3332,7 @@ __init int intel_pmu_init(void)
 
 		x86_pmu.event_constraints = intel_gen_event_constraints;
 		x86_pmu.pebs_constraints = intel_atom_pebs_event_constraints;
+		x86_pmu.pebs_aliases = intel_pebs_aliases_core2;
 		pr_cont("Atom events, ");
 		break;
 
diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c
index dae5f93..1b748ee 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
@@ -620,6 +620,8 @@ struct event_constraint intel_atom_pebs_event_constraints[] = {
 	INTEL_FLAGS_EVENT_CONSTRAINT(0xcb, 0x1),    /* MEM_LOAD_RETIRED.* */
 	/* INST_RETIRED.ANY_P, inv=1, cmask=16 (cycles:p). */
 	INTEL_FLAGS_EVENT_CONSTRAINT(0x108000c0, 0x01),
+	/* Allow all events as PEBS with no flags */
+	INTEL_ALL_EVENT_CONSTRAINT(0, 0x1),
 	EVENT_CONSTRAINT_END
 };
 
-- 
1.9.1

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Back to linux.kernel | Previous | NextPrevious in thread | Next in thread | Find similar | Unroll thread


Thread

[PATCH v2 0/2] perf/x86: fixes and improvement for Intel Atom PEBS support Stephane Eranian <eranian@google.com> - 2015-12-03 21:10 +0100
  [PATCH v2 2/2] perf/x86: enable cycles:pp for Intel Atom Stephane Eranian <eranian@google.com> - 2015-12-03 21:10 +0100
    Re: [PATCH v2 2/2] perf/x86: enable cycles:pp for Intel Atom Andi Kleen <ak@linux.intel.com> - 2015-12-03 21:20 +0100
      Re: [PATCH v2 2/2] perf/x86: enable cycles:pp for Intel Atom Stephane Eranian <eranian@google.com> - 2015-12-03 22:50 +0100
  [PATCH v2 1/2] perf/x86: fix PEBS and LBR issues on Intel Atom Stephane Eranian <eranian@google.com> - 2015-12-03 21:10 +0100
    Re: [PATCH v2 1/2] perf/x86: fix PEBS and LBR issues on Intel Atom Peter Zijlstra <peterz@infradead.org> - 2015-12-03 22:00 +0100
      Re: [PATCH v2 1/2] perf/x86: fix PEBS and LBR issues on Intel Atom Andi Kleen <ak@linux.intel.com> - 2015-12-03 22:30 +0100

csiph-web