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Re: [PATCH] x86, pat: Add comments to cachemode translation tables

From Thomas Gleixner <tglx@linutronix.de>
Newsgroups linux.kernel
Subject Re: [PATCH] x86, pat: Add comments to cachemode translation tables
Date 2015-08-02 12:10 +0200
Message-ID <pSYnn-Jb-1@gated-at.bofh.it> (permalink)
References (2 earlier) <pPpFw-RC-37@gated-at.bofh.it> <pPq8y-1pC-7@gated-at.bofh.it> <pPqBB-2df-43@gated-at.bofh.it> <pPqLg-2oy-17@gated-at.bofh.it> <pPqUV-2A7-5@gated-at.bofh.it>
Organization linux.* mail to news gateway

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On Thu, 23 Jul 2015, Toshi Kani wrote:
> On Thu, 2015-07-23 at 09:36 -0600, Jan Beulich wrote:
> > > 
> > > > > On 23.07.15 at 17:25, <toshi.kani@hp.com> wrote:
> > > Yes, I agree with you.  But such risk is very low -- 1) the regular 
> > > case
> > > (no fallback) is used most of the cases, 2) the code using WT knows 
> > > what
> > > type of memory it is dealing with.  For example, pmem may map NVDIMM 
> > > with
> > > WT, and any sane BIOS sets MTRR to WB for NVDIMM. 
> > 
> > Do the words "sane" and "BIOS" really fit together in your opinion?
> 
> :-)
> 
> Anyway, I am not disagreeing with you... When UC is ready for both regular
> memory and IO memory, it should be changed to fall back to UC.

What's the resolution of this discussion? Is that patch correct as is
or do we get an updated version?

Thanks,

	tglx
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Thread

[PATCH] x86, pat: Add comments to cachemode translation tables Toshi Kani <toshi.kani@hp.com> - 2015-07-22 20:10 +0200
  Re: [PATCH] x86, pat: Add comments to cachemode translation  tables "Jan Beulich" <JBeulich@suse.com> - 2015-07-23 08:50 +0200
    Re: [PATCH] x86, pat: Add comments to cachemode translation tables Thomas Gleixner <tglx@linutronix.de> - 2015-08-02 12:10 +0200
      Re: [PATCH] x86, pat: Add comments to cachemode translation tables Toshi Kani <toshi.kani@hp.com> - 2015-08-03 17:10 +0200

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