Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > comp.programming.threads > #2203
| From | Ivan Godard <ivan@ootbcomp.com> |
|---|---|
| Newsgroups | comp.programming.threads, comp.programming, comp.arch |
| Subject | Re: About lockfree and waitfree... (2nd try) |
| Date | 2014-04-21 14:53 -0700 |
| Organization | A noiseless patient Spider |
| Message-ID | <lj4412$s26$1@dont-email.me> (permalink) |
| References | (3 earlier) <lir0dp$qnh$1@needham.csi.cam.ac.uk> <53510bf9$0$52760$742ec2ed@news.sonic.net> <lis216$i8l$1@dont-email.me> <lj42ch$60f$1@speranza.aioe.org> <lj42mn$6l2$1@speranza.aioe.org> |
Cross-posted to 3 groups.
On 4/21/2014 2:31 PM, Chris M. Thomasson wrote: >> "Chris M. Thomasson" wrote in message >> news:lj42ch$60f$1@speranza.aioe.org... >>> "Ivan Godard" wrote in message >>> news:lis216$i8l$1@dont-email.me... >> >>> On 4/18/2014 4:26 AM, Rob Warnock wrote: >>>> Nick Maclaren <nmm1@cam.ac.uk> wrote: >> [...] >> >> I need #StoreLoad | #StoreStore semantics before I read the >> eventcount. >> >> <crude, simple pseudo-code> >> _____________________________________________ [...] >> _____________________________________________ >> >> this is a critical part of the algorithm where I need all of the >> waiting consumers to see g_ustate = 123 when they wake up. This is >> why I need #StoreLoad ordering here... > > Also, there is another problem with a lost wakeup if the #StoreLoad > ordering is not properly honored... > > > WRT Mill, I understand that it will work if the affinity masks bind > everything to a single chip... Right? > We equate the scope of coherence with the single shared virtual address space. The Mill caches are in virtual, so coherence is by virtual address. Two different virtual addresses that are mapped to the same physical address do not cohere. However, cross-mapping like that is used only for constant data (or COW data) and for the OS access to the page tables; appplications, and the OS apart from the pager, do not see physical aliasing. Affinity can migrate, but only within that single global space. Currently we plan to restrict a single address space to a single chip. Although family members may be configured with several global spaces on a single chip (each with their associated cores), none of those spaces extend off-chip. There is of course no coherence among different spaces, because there are no shared addresses to cohere. > What about inter-chip communication? Do I have to use something > special for that, like a message passing interface? Yes. That on-chip/off-chip distinction seems to be the way HPC is going, and board/rack/room level coherence seems to be of legacy interest only. Of course, if a customer were willing to pay the NRE... > Will the eventcount work with #StoreLoad ordering if multiple > producers/consumers are executing on different physical chips and/or > cores within a single chip? I think so, on one chip and for cores that use the same global address space. But I'd really like someone who knows this stuff to work it through and confirm. It's not my expertise.
Back to comp.programming.threads | Previous | Next — Previous in thread | Next in thread | Find similar | Unroll thread
About lockfree and waitfree... aminer <aminer@toto.net> - 2014-04-13 19:54 -0700
Re: About lockfree and waitfree... "Chris M. Thomasson" <no@spam.invalid> - 2014-04-13 19:38 -0700
Re: About lockfree and waitfree... "Chris M. Thomasson" <no@spam.invalid> - 2014-04-13 19:47 -0700
Re: About lockfree and waitfree... aminer <aminer@toto.net> - 2014-04-13 22:56 -0700
Re: About lockfree and waitfree... "Chris M. Thomasson" <no@spam.invalid> - 2014-04-14 14:08 -0700
Re: About lockfree and waitfree... "Chris M. Thomasson" <no@spam.invalid> - 2014-04-14 14:23 -0700
Re: About lockfree and waitfree... Ivan Godard <ivan@ootbcomp.com> - 2014-04-14 16:27 -0700
Re: About lockfree and waitfree... (2nd try) Ivan Godard <ivan@ootbcomp.com> - 2014-04-14 16:29 -0700
Re: About lockfree and waitfree... (2nd try) "Chris M. Thomasson" <no@spam.invalid> - 2014-04-15 10:04 -0700
Re: About lockfree and waitfree... (2nd try) Ivan Godard <ivan@ootbcomp.com> - 2014-04-15 10:34 -0700
Re: About lockfree and waitfree... (2nd try) "Chris M. Thomasson" <no@spam.invalid> - 2014-04-17 16:35 -0700
Re: About lockfree and waitfree... (2nd try) Ivan Godard <ivan@ootbcomp.com> - 2014-04-17 17:04 -0700
Re: About lockfree and waitfree... (2nd try) nmm@needham.csi.cam.ac.uk (Nick Maclaren) - 2014-04-18 09:54 +0100
Re: About lockfree and waitfree... (2nd try) Ivan Godard <ivan@ootbcomp.com> - 2014-04-18 02:31 -0700
Re: About lockfree and waitfree... (2nd try) nmm@needham.csi.cam.ac.uk (Nick Maclaren) - 2014-04-18 11:56 +0100
Re: About lockfree and waitfree... (2nd try) rpw3@rpw3.org (Rob Warnock) - 2014-04-18 11:26 +0000
Re: About lockfree and waitfree... (2nd try) Ivan Godard <ivan@ootbcomp.com> - 2014-04-18 13:30 -0700
Re: About lockfree and waitfree... (2nd try) "Chris M. Thomasson" <no@spam.invalid> - 2014-04-21 14:25 -0700
Re: About lockfree and waitfree... (2nd try) "Chris M. Thomasson" <no@spam.invalid> - 2014-04-21 14:31 -0700
Re: About lockfree and waitfree... (2nd try) Ivan Godard <ivan@ootbcomp.com> - 2014-04-21 14:53 -0700
Re: About lockfree and waitfree... (2nd try) "Chris M. Thomasson" <no@spam.invalid> - 2014-04-22 14:21 -0700
Re: About lockfree and waitfree... (2nd try) "Chris M. Thomasson" <no@spam.invalid> - 2014-04-22 14:36 -0700
Re: About lockfree and waitfree... (2nd try) Ivan Godard <ivan@ootbcomp.com> - 2014-04-22 15:30 -0700
Re: About lockfree and waitfree... (2nd try) "Chris M. Thomasson" <no@spam.invalid> - 2014-05-01 00:48 -0700
Re: About lockfree and waitfree... (2nd try) "Chris M. Thomasson" <no@spam.invalid> - 2014-05-25 13:16 -0700
Re: About lockfree and waitfree... (2nd try) "Chris M. Thomasson" <no@spam.invalid> - 2014-04-21 14:34 -0700
Re: About lockfree and waitfree... (2nd try) Robert Wessel <robertwessel2@yahoo.com> - 2014-04-21 16:42 -0500
Re: About lockfree and waitfree... (2nd try) Ivan Godard <ivan@ootbcomp.com> - 2014-04-21 15:02 -0700
Re: About lockfree and waitfree... (2nd try) nmm@needham.csi.cam.ac.uk (Nick Maclaren) - 2014-04-22 09:05 +0100
Re: About lockfree and waitfree... (2nd try) Stephen Fuld <SFuld@alumni.cmu.edu.invalid> - 2014-04-22 09:27 -0700
Re: About lockfree and waitfree... (2nd try) Ivan Godard <ivan@ootbcomp.com> - 2014-04-22 09:45 -0700
Re: About lockfree and waitfree... (2nd try) nmm@needham.csi.cam.ac.uk (Nick Maclaren) - 2014-04-22 18:08 +0100
Re: About lockfree and waitfree... (2nd try) Stephen Fuld <SFuld@alumni.cmu.edu.invalid> - 2014-04-23 12:08 -0700
Re: About lockfree and waitfree... (2nd try) nmm@needham.csi.cam.ac.uk (Nick Maclaren) - 2014-04-23 20:32 +0100
Re: About lockfree and waitfree... (2nd try) Stephen Fuld <SFuld@alumni.cmu.edu.invalid> - 2014-04-23 13:21 -0700
Re: About lockfree and waitfree... (2nd try) nmm@needham.csi.cam.ac.uk (Nick Maclaren) - 2014-04-23 21:51 +0100
Re: About lockfree and waitfree... (2nd try) Chris Gray <cg@GraySage.COM> - 2014-04-24 10:53 -0600
Re: About lockfree and waitfree... (2nd try) nmm@needham.csi.cam.ac.uk (Nick Maclaren) - 2014-04-24 18:02 +0100
Re: About lockfree and waitfree... (2nd try) Stephen Fuld <SFuld@alumni.cmu.edu.invalid> - 2014-04-25 13:39 -0700
Re: About lockfree and waitfree... (2nd try) "Chris M. Thomasson" <no@spam.invalid> - 2014-04-22 22:08 -0700
Re: About lockfree and waitfree... (2nd try) George Neuner <gneuner2@comcast.net> - 2014-04-17 21:15 -0400
Re: About lockfree and waitfree... (2nd try) George Neuner <gneuner2@comcast.net> - 2014-04-17 21:25 -0400
Re: About lockfree and waitfree... (2nd try) Ivan Godard <ivan@ootbcomp.com> - 2014-04-17 19:17 -0700
Re: About lockfree and waitfree... (2nd try) George Neuner <gneuner2@comcast.net> - 2014-04-18 00:46 -0400
Re: About lockfree and waitfree... (2nd try) Ivan Godard <ivan@ootbcomp.com> - 2014-04-17 18:52 -0700
Re: About lockfree and waitfree... aminer <aminer@toto.net> - 2014-04-13 22:54 -0700
csiph-web