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Groups > comp.lang.forth > #41630

Re: Forth CPUs with NO Interrupts

From Bob <bob@none.com>
Newsgroups comp.lang.forth
Subject Re: Forth CPUs with NO Interrupts
References <mrjgkk$rde$1@dont-email.me> <4a53193d-9484-4de1-bfae-fc31def6e307@googlegroups.com> <2421d53e-a54b-4a33-beff-1d161f600b97@googlegroups.com>
Message-ID <aF6Fx.7$tS.1@fx07.iad> (permalink)
Organization Newshosting.com - Highest quality at a great price! www.newshosting.com
Date 2015-08-31 20:49 -0400

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On 08/30/2015 11:06 PM, hughaguilar96@gmail.com wrote:
> I agree that having more than one processor makes things easier. 
The MiniForth had an 8032 on board with some 64MB of RAM (not a
typo: 64MB not 64KB). The 8032 had a UART built in, which the
MiniForth lacked, so the 8032 buffered the files from the
desktop-computer and then fed the data to the MiniForth through
parallel I/O --- this way the MiniForth could do the laser
etching, but not have to store the big files in memory (it had
limited memory) --- the timing was pretty precise on the
motion-control, so you really can't have the processor
interrupted by a UART while it is in the middle of etching.
> 
> I've been thinking about upgrading the FMITE so that it could 
be multi-core. It is pretty small, so on a big FPGA it there
would be room for more than one of them. I would need semaphores
so they don't step on each other's toes when accessing common
RAM. Can you describe what is needed here? I think I need a
primitive that can read and modify a memory location in one step.
> 

A primitive that can do three things in order in one step all at
once is impossible.

The 8086 instruction LOCK causes the cpu hardware to output on a
pin from the start of read to end of write to tell the ram
arbitrator not to let any other cpu interfere.  That is equivalent
to disable interrupts on a single cpu.

A totally different approach to communication between processes
is to use a linked list of small message buffers.  One process
uses the head pointer to take messages.  The other process uses
the tail pointer to send messages.  Neither steps on the other's
pointer.  This works without disabling interrupts on a single cpu
and it works without locking hardware on multiple cpus with
shared ram.

The ram needs to correctly complete one read or write at a time.  It
cannot mix bits from two simultaneous transfers.  If you have that
you have all you need.  You may want more but you have what you
need.

odu_bob

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Thread

Forth CPUs with NO Interrupts rickman <gnuarm@gmail.com> - 2015-08-26 00:53 -0400
  Re: Forth CPUs with NO Interrupts anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2015-08-26 08:51 +0000
    Re: Forth CPUs with NO Interrupts rickman <gnuarm@gmail.com> - 2015-08-26 08:50 -0400
    Re: Forth CPUs with NO Interrupts "Elizabeth D. Rather" <erather@forth.com> - 2015-08-26 07:23 -1000
  Re: Forth CPUs with NO Interrupts Mark Wills <markwills1970@gmail.com> - 2015-08-26 04:33 -0700
    Re: Forth CPUs with NO Interrupts rickman <gnuarm@gmail.com> - 2015-08-26 08:46 -0400
    Re: Forth CPUs with NO Interrupts mhx@iae.nl - 2015-08-26 11:17 -0700
    Re: Forth CPUs with NO Interrupts hughaguilar96@gmail.com - 2015-08-26 12:50 -0700
      Re: Forth CPUs with NO Interrupts rickman <gnuarm@gmail.com> - 2015-08-26 18:28 -0400
    Re: Forth CPUs with NO Interrupts hughaguilar96@gmail.com - 2015-08-27 23:44 -0700
      Re: Forth CPUs with NO Interrupts Mux <Yvo.Zoer@gmail.com> - 2015-08-28 18:28 -0700
  Re: Forth CPUs with NO Interrupts Walter Banks <walter@bytecraft.com> - 2015-08-26 11:41 -0400
  Re: Forth CPUs with NO Interrupts Syd Rumpo <usenet@nononono.co.uk> - 2015-08-26 17:12 +0100
    Re: Forth CPUs with NO Interrupts Mux <Yvo.Zoer@gmail.com> - 2015-08-26 09:48 -0700
    Re: Forth CPUs with NO Interrupts rickman <gnuarm@gmail.com> - 2015-08-26 18:39 -0400
  Re: Forth CPUs with NO Interrupts "Ala'a Alawi" <amalawi@gmail.com> - 2015-08-27 08:37 -0700
  Re: Forth CPUs with NO Interrupts pbjtech@gmail.com - 2015-08-30 19:01 -0700
    Re: Forth CPUs with NO Interrupts rickman <gnuarm@gmail.com> - 2015-08-30 22:45 -0400
      Re: Forth CPUs with NO Interrupts Reinhardt Behm <rbehm@hushmail.com> - 2015-08-31 11:09 +0800
    Re: Forth CPUs with NO Interrupts hughaguilar96@gmail.com - 2015-08-30 20:06 -0700
      Re: Forth CPUs with NO Interrupts rickman <gnuarm@gmail.com> - 2015-08-30 23:20 -0400
        Re: Forth CPUs with NO Interrupts hughaguilar96@gmail.com - 2015-09-02 14:14 -0700
          Re: Forth CPUs with NO Interrupts rickman <gnuarm@gmail.com> - 2015-09-02 18:02 -0400
      Re: Forth CPUs with NO Interrupts Bob <bob@none.com> - 2015-08-31 20:49 -0400
        Re: Forth CPUs with NO Interrupts Mark Wills <markwills1970@gmail.com> - 2015-09-01 01:39 -0700
          Re: Forth CPUs with NO Interrupts dunno <dunno@dunno.dunno> - 2015-09-01 17:58 +0000
          Re: Forth CPUs with NO Interrupts Bob <bob@none.com> - 2015-09-01 18:48 -0400
            Re: Forth CPUs with NO Interrupts hughaguilar96@gmail.com - 2015-09-01 16:32 -0700
            Re: Forth CPUs with NO Interrupts Bernd Paysan <bernd.paysan@gmx.de> - 2015-09-02 01:38 +0200
              Re: Forth CPUs with NO Interrupts rickman <gnuarm@gmail.com> - 2015-09-01 22:09 -0400
                Re: Forth CPUs with NO Interrupts Bernd Paysan <bernd.paysan@gmx.de> - 2015-09-02 14:12 +0200
                Re: Forth CPUs with NO Interrupts rickman <gnuarm@gmail.com> - 2015-09-02 12:40 -0400
                Re: Forth CPUs with NO Interrupts Mux <Yvo.Zoer@gmail.com> - 2015-09-02 10:40 -0700
                Re: Forth CPUs with NO Interrupts rickman <gnuarm@gmail.com> - 2015-09-02 16:57 -0400
                Re: Forth CPUs with NO Interrupts Mux <Yvo.Zoer@gmail.com> - 2015-09-02 14:55 -0700
                Re: Forth CPUs with NO Interrupts rickman <gnuarm@gmail.com> - 2015-09-02 18:11 -0400
                Re: Forth CPUs with NO Interrupts Mux <Yvo.Zoer@gmail.com> - 2015-09-02 16:20 -0700
                Re: Forth CPUs with NO Interrupts rickman <gnuarm@gmail.com> - 2015-09-02 20:42 -0400
                Re: Forth CPUs with NO Interrupts Mux <Yvo.Zoer@gmail.com> - 2015-09-02 22:34 -0700
                Re: Forth CPUs with NO Interrupts rickman <gnuarm@gmail.com> - 2015-09-03 12:59 -0400
                Re: Forth CPUs with NO Interrupts Mux <Yvo.Zoer@gmail.com> - 2015-09-03 15:54 -0700
                Re: Forth CPUs with NO Interrupts rickman <gnuarm@gmail.com> - 2015-09-03 19:54 -0400
                Re: Forth CPUs with NO Interrupts Mux <Yvo.Zoer@gmail.com> - 2015-09-03 21:13 -0700
                Re: Forth CPUs with NO Interrupts Jan Coombs <Jan-54 <jenfhaomndgfwutc@murmic.plus.com>> - 2015-09-04 09:48 +0100
                Re: Forth CPUs with NO Interrupts Mux <Yvo.Zoer@gmail.com> - 2015-09-04 08:49 -0700
                Re: Forth CPUs with NO Interrupts hughaguilar96@gmail.com - 2015-09-04 11:15 -0700
                Re: Forth CPUs with NO Interrupts rickman <gnuarm@gmail.com> - 2015-09-04 14:32 -0400
                Re: Forth CPUs with NO Interrupts Mux <Yvo.Zoer@gmail.com> - 2015-09-04 11:36 -0700
                Re: Forth CPUs with NO Interrupts rickman <gnuarm@gmail.com> - 2015-09-04 17:46 -0400
                Re: Forth CPUs with NO Interrupts rickman <gnuarm@gmail.com> - 2015-09-04 11:47 -0400
                Re: Forth CPUs with NO Interrupts Mux <Yvo.Zoer@gmail.com> - 2015-09-04 09:20 -0700
                Re: Forth CPUs with NO Interrupts rickman <gnuarm@gmail.com> - 2015-09-04 12:52 -0400
                Re: Forth CPUs with NO Interrupts Mux <Yvo.Zoer@gmail.com> - 2015-09-04 10:20 -0700
                Re: Forth CPUs with NO Interrupts Bernd Paysan <bernd.paysan@gmx.de> - 2015-09-02 23:35 +0200
                Re: Forth CPUs with NO Interrupts rickman <gnuarm@gmail.com> - 2015-09-02 18:09 -0400
                Re: Forth CPUs with NO Interrupts Bernd Paysan <bernd.paysan@gmx.de> - 2015-09-03 02:07 +0200
                Re: Forth CPUs with NO Interrupts rickman <gnuarm@gmail.com> - 2015-09-02 20:49 -0400
                Re: Forth CPUs with NO Interrupts Bernd Paysan <bernd.paysan@gmx.de> - 2015-09-03 14:30 +0200
    Re: Forth CPUs with NO Interrupts hughaguilar96@gmail.com - 2015-09-02 14:23 -0700

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