adding overflow and carry to every GPR (was Re: OT: Epic RISC-V rant)

From	Kragen Javier Sitaker <kragen@canonical.org>
Newsgroups	comp.lang.forth, comp.arch
Subject	adding overflow and carry to every GPR (was Re: OT: Epic RISC-V rant)
Date	2026-09-01 17:15 -0300
Organization	Primarily biological and memetic
Message-ID	<87a4q0afu7.fsf_-_@debian> (permalink)
References	<87qzk0nejz.fsf@nightsong.com> <116d89d$27baf$1@paganini.bofh.team> <2026Aug24.095510@mips.complang.tuwien.ac.at>

Cross-posted to 2 groups.

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anton@mips.complang.tuwien.ac.at (Anton Ertl) writes:
> RISC-V follows its ancestor MIPS (from where it also has many
> mnemonics) in this respect.  For a new way to add the carry
> functionality without adding a condition code register, read
>
> https://www.complang.tuwien.ac.at/anton/tmp/carry.pdf
>
> (unpublished).

This is a fascinating idea.  I guess the MuP21 had a carry bit in every
“general-purpose register”, making them 21 bits, but I’ve never seen any
other architecture do this, nor a version that separates out overflow
bits from carry bits.

I also didn’t realize that (base) RISC-V needed 5 instructions *per
word* for multi-precision addition.

Thank you for sharing your draft!

Kragen

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adding overflow and carry to every GPR (was Re: OT: Epic RISC-V rant) Kragen Javier Sitaker <kragen@canonical.org> - 2026-09-01 17:15 -0300
  Re: adding overflow and carry to every GPR (was Re: OT: Epic RISC-V rant) John Ames <commodorejohn@gmail.com> - 2026-09-01 14:31 -0700
    Re: adding overflow and carry to every GPR (was Re: OT: Epic RISC-V rant) BGB <cr88192@gmail.com> - 2026-09-01 17:18 -0500
    Re: adding overflow and carry to every GPR (was Re: OT: Epic RISC-V rant) MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-09-02 02:04 +0000
      Re: adding overflow and carry to every GPR (was Re: OT: Epic RISC-V rant) John Ames <commodorejohn@gmail.com> - 2026-09-02 08:23 -0700
        Re: adding overflow and carry to every GPR (was Re: OT: Epic RISC-V rant) Kragen Javier Sitaker <kragen@canonical.org> - 2026-09-11 13:48 -0300
          Re: adding overflow and carry to every GPR (was Re: OT: Epic RISC-V rant) MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-09-11 18:03 +0000
      Re: adding overflow and carry to every GPR (was Re: OT: Epic RISC-V rant) Kragen Javier Sitaker <kragen@canonical.org> - 2026-09-02 13:52 -0300
        Re: adding overflow and carry to every GPR (was Re: OT: Epic RISC-V rant) MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-09-02 17:41 +0000
    Re: adding overflow and carry to every GPR (was Re: OT: Epic RISC-V rant) anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-09-09 11:16 +0000
  Re: adding overflow and carry to every GPR (was Re: OT: Epic RISC-V rant) MitchAlsup <user5857@newsgrouper.org.invalid> - 2026-09-02 01:53 +0000
  Re: adding overflow and carry to every GPR (was Re: OT: Epic RISC-V rant) EricP <ThatWouldBeTelling@thevillage.com> - 2026-09-05 12:08 -0400
    Re: adding overflow and carry to every GPR (was Re: OT: Epic RISC-V rant) anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-09-09 13:36 +0000
  Re: adding overflow and carry to every GPR (was Re: OT: Epic RISC-V rant) anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2026-09-09 10:50 +0000
    Re: adding overflow and carry to every GPR (was Re: OT: Epic RISC-V rant) Paul Rubin <no.email@nospam.invalid> - 2026-09-09 22:10 -0700
    Re: adding overflow and carry to every GPR (was Re: OT: Epic RISC-V rant) Kragen Javier Sitaker <kragen@canonical.org> - 2026-09-11 14:28 -0300

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