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Re: Binary switching logic circuits versus rotary switching 1 to n position switching logic circuits.

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On 8/16/2011 6:38 PM, Robert Wessel wrote:
> On Tue, 16 Aug 2011 18:11:33 -0700, "Andy \"Krazy\" Glew"
> <andy@SPAM.comp-arch.net>  wrote:
>
>> On 8/16/2011 1:53 PM, Ian Martin Ajzenszmidt wrote:
>>> On Aug 17, 5:13 am, MitchAlsup<MitchAl...@aol.com>   wrote:
>>>> The reason that binary "took over" in logic design is that it has the largest signal to noise tollerance of any logic family. This translates into vanishingly low error rates and highest possible speed/power product.
>>>>
>>>> 1-bit inverter 60 GHz
>>>> 4-bit flash converter 7 GHz
>>>> 8-bit A/D 200 MHz
>>>> 14-bit A/D 16 MHz
>>>> 20-bit A/D 2 MHz  (only reaches 18.3 bits of precision)
>>>>
>>>> Notice a pattern?
>>>
>>> Based on the following Wikipedia article, and its Literature
>>> citations, use 2 to n possible value logic, where n is a number from 1
>>> to infinity. Lower electricity consumption.
>>>
>>> http://en.wikipedia.org/wiki/Ternary_computer
>>
>> Yeah?  So?
>>
>> It's still an issue of noise.
>>
>> If you have a circuit technology that is extremely low noise, go for
>> multilevel.
>>
>> Note that flash uses multiple signal levels per bitcell - although it is
>> quickly converted into binary.
>
>
> And MLC flash would be pretty unusable without error correction.
>
> Something I've wondered about for years is that I've never heard of
> anyone doing anything other than four or eight level MLC flash.  Given
> that essentially all MLC flash goes into disk-like products with
> sector-size (or bigger) accesses, doing an odd (non-power-of-two)
> number of levels is perfectly plausible, since you can even that out
> over many bits (and the left over can be very, very small).  You could
> obviously have a lot more room to tweak or gradually evolve your
> process.

A friend of mine who designs flash disks / SSDs told me that when you 
have, say, 4 level MLC flash, it is

NOT 2 bits from the same disk block encoded in the same physical storage 
cell

BUT 2 separate bits, from 2 separate disk blocks, encoded in the same 
physical storage cell.

He said that the products he designed could not write any of the 4 
levels all at the same time.

Instead, he said that you can only write to half of the levels at a 
time. I did not quite follow why, although I might guess that it is 
related to error correction, and that you are always doing RMWs.

If this is (still) true, then it might explain why tri-level is hard: 
you would not just be writing ceil( NBitsPerBlock/3 ) storage cells with 
arbitrary ternary values.

With zeroing being a special operation.

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Binary switching logic circuits versus rotary switching 1 to n position switching logic circuits. Ian Martin Ajzenszmidt <iajzenszmi@gmail.com> - 2011-08-16 11:38 -0700
  Re: Binary switching logic circuits versus rotary switching 1 to n position switching logic circuits. MitchAlsup <MitchAlsup@aol.com> - 2011-08-16 12:13 -0700
    Re: Binary switching logic circuits versus rotary switching 1 to n position switching logic circuits. Ian Martin Ajzenszmidt <iajzenszmi@gmail.com> - 2011-08-16 13:53 -0700
      Re: Binary switching logic circuits versus rotary switching 1 to n position switching logic circuits. "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-08-16 18:11 -0700
        Re: Binary switching logic circuits versus rotary switching 1 to n position switching logic circuits. Robert Wessel <robertwessel2@yahoo.com> - 2011-08-16 20:38 -0500
          Re: Binary switching logic circuits versus rotary switching 1 to n position switching logic circuits. "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-08-16 20:50 -0700
            Re: Binary switching logic circuits versus rotary switching 1 to n position switching logic circuits. Robert Wessel <robertwessel2@yahoo.com> - 2011-08-16 23:43 -0500

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