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Groups > sci.electronics.design > #489391
| From | Winfield Hill <hill@rowland.harvard.edu> |
|---|---|
| Newsgroups | sci.electronics.design |
| Subject | Re: Power MOSET gate capacitance variations |
| Date | 2017-12-27 05:32 -0800 |
| Organization | Rowland Institute |
| Message-ID | <p207d601gse@drn.newsguy.com> (permalink) |
| References | <p1rk82$e9r$1@node2.news.atman.pl> |
Piotr Wyderski wrote...
>
> I've just measured ten MOSFETs from the same reel and their gate
> capacitance is between 1450 and 1900pF, with ~1620 being the most
> common. Since capacitance = area*permittivity/distance and the
> dielectric is the same SiO2, only area and distance (thickness) can
> vary. I don't think the manufacturer has no control over the area,
> as it is some form of litography, and thickness is proportional to
> the oxide growth time, which is exactly the same within a batch.
> So what is going on here?
With such a high capacitance, it appears you're talking
about a power MOSFET (it'd be nice to know the type).
As you know, these are made with a vertical structure
with a repeating fine-pitched laterally-stacked pattern.
The exact height of the vertical structure is probably
not very well controlled, and the lateral (not vertical)
gate oxide thicknesses may also not be well controlled.
From an Infineon note, "laterally stacked fine-pitched
pattern of alternating arranged p- and n-areas. The
finer the pitch can be made, the lower the on-state
resistance of the device will be". Manufacturers are
optimizing for density, not dimensional uniformity.
--
Thanks,
- Win
Back to sci.electronics.design | Previous | Next — Previous in thread | Next in thread | Find similar
Power MOSET gate capacitance variations Piotr Wyderski <peter.pan@neverland.mil> - 2017-12-25 20:40 +0100
Re: Power MOSET gate capacitance variations Joerg <news@analogconsultants.com> - 2017-12-25 12:08 -0800
Re: Power MOSET gate capacitance variations Cursitor Doom <curd@notformail.com> - 2017-12-25 20:33 +0000
Re: Power MOSET gate capacitance variations Joerg <news@analogconsultants.com> - 2017-12-25 12:41 -0800
Re: Power MOSET gate capacitance variations Jim Thompson <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> - 2017-12-25 13:57 -0700
Re: Power MOSET gate capacitance variations amdx <nojunk@knology.net> - 2017-12-26 07:48 -0600
Re: Power MOSET gate capacitance variations Chris Jones <lugnut808@spam.yahoo.com> - 2017-12-26 23:10 +1100
Re: Power MOSET gate capacitance variations "Tim Williams" <tiwill@seventransistorlabs.com> - 2017-12-26 09:35 -0600
Re: Power MOSET gate capacitance variations Phil Hobbs <pcdhSpamMeSenseless@electrooptical.net> - 2017-12-26 14:57 -0500
Re: Power MOSET gate capacitance variations Chris Jones <lugnut808@spam.yahoo.com> - 2017-12-27 22:48 +1100
Re: Power MOSET gate capacitance variations Phil Hobbs <pcdhSpamMeSenseless@electrooptical.net> - 2017-12-26 12:58 -0500
Re: Power MOSET gate capacitance variations Winfield Hill <hill@rowland.harvard.edu> - 2017-12-27 05:32 -0800
Re: Power MOSET gate capacitance variations Piotr Wyderski <peter.pan@neverland.mil> - 2017-12-27 16:15 +0100
Re: Power MOSET gate capacitance variations Winfield Hill <hill@rowland.harvard.edu> - 2017-12-27 08:47 -0800
Re: Power MOSET gate capacitance variations "Tim Williams" <tiwill@seventransistorlabs.com> - 2017-12-27 11:47 -0600
Re: Power MOSET gate capacitance variations Piotr Wyderski <peter.pan@neverland.mil> - 2017-12-31 11:06 +0100
Re: Power MOSET gate capacitance variations "Tim Williams" <tiwill@seventransistorlabs.com> - 2017-12-31 10:43 -0600
Re: Power MOSET gate capacitance variations Winfield Hill <hill@rowland.harvard.edu> - 2017-12-31 10:32 -0800
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