[PATCH 5/7] ARM: dts: sun8i: h3: Enable dwmac-sun8i on the Nanopi M1

From	Philipp Rossak <embed3d@gmail.com>
Newsgroups	linux.kernel
Subject	[PATCH 5/7] ARM: dts: sun8i: h3: Enable dwmac-sun8i on the Nanopi M1
Date	2017-08-30 05:10 +0200
Message-ID	<uk1ya-2Ub-25@gated-at.bofh.it> (permalink)
References	<uk1y9-2Ub-7@gated-at.bofh.it>
Organization	linux.* mail to news gateway

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From: Philipp Rossak <embed3d@gmail.com>

The dwmac-sun8i hardware is present on the Nanopi M1.
It uses the internal PHY.

Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
 arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts
index 3a2ccdb..c77fbca 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts
@@ -45,6 +45,10 @@
 / {
 	model = "FriendlyArm NanoPi M1";
 	compatible = "friendlyarm,nanopi-m1", "allwinner,sun8i-h3";
+
+	aliases {
+		ethernet0 = &emac;
+	};
 };
 
 &ehci1 {
@@ -55,6 +59,13 @@
 	status = "okay";
 };
 
+&emac {
+	phy-handle = <&int_mii_phy>;
+	phy-mode = "mii";
+	allwinner,leds-active-low;
+	status = "okay";
+};
+
 &ir {
 	pinctrl-names = "default";
 	pinctrl-0 = <&ir_pins_a>;
-- 
2.7.4

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[PATCH 0/7] [DTS] enable hardware for Nanopi M1 & Nanopi M1 Plus Philipp Rossak <embed3d@gmail.com> - 2017-08-30 05:10 +0200
  [PATCH 6/7] ARM: dts: sun8i: h3: Adding UART3 RTS and CTS Pins Philipp Rossak <embed3d@gmail.com> - 2017-08-30 05:10 +0200
    Re: [PATCH 6/7] ARM: dts: sun8i: h3: Adding UART3 RTS and CTS Pins Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-09-01 15:00 +0200
  [PATCH 5/7] ARM: dts: sun8i: h3: Enable dwmac-sun8i on the Nanopi M1 Philipp Rossak <embed3d@gmail.com> - 2017-08-30 05:10 +0200

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