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Groups > linux.kernel > #1703968
| From | Michal Simek <michal.simek@xilinx.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH 0/9] Ata ceva patches |
| Date | 2017-08-04 15:20 +0200 |
| Message-ID | <uaKGe-7th-9@gated-at.bofh.it> (permalink) |
| Organization | linux.* mail to news gateway |
Hi, this patchset contains the latest changes which are available in Xilinx tree. Thanks, Michal Anurag Kumar Vulisha (9): devicetree: bindings: Add sata port phy config parameters in ahci-ceva ata: ceva: Move sata port phy oob settings to device-tree ata: ceva: Add gen 3 mode support in driver ata: ceva: Disable Device Sleep capability ata: ceva: Make RxWaterMark value as module parameter ata: ceva: Add CCI support for SATA if CCI is enabled ata: ceva: Correct the AXI bus configuration for SATA ports ata: ceva: Correct the suspend and resume logic for SATA ata: ceva: Add SMMU support for SATA IP .../devicetree/bindings/ata/ahci-ceva.txt | 39 ++++ drivers/ata/ahci_ceva.c | 197 +++++++++++++++++---- 2 files changed, 198 insertions(+), 38 deletions(-) -- 1.9.1
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[PATCH 0/9] Ata ceva patches Michal Simek <michal.simek@xilinx.com> - 2017-08-04 15:20 +0200
[PATCH 7/9] ata: ceva: Correct the AXI bus configuration for SATA ports Michal Simek <michal.simek@xilinx.com> - 2017-08-04 15:20 +0200
[PATCH 6/9] ata: ceva: Add CCI support for SATA if CCI is enabled Michal Simek <michal.simek@xilinx.com> - 2017-08-04 15:20 +0200
[PATCH 4/9] ata: ceva: Disable Device Sleep capability Michal Simek <michal.simek@xilinx.com> - 2017-08-04 15:20 +0200
[PATCH 2/9] ata: ceva: Move sata port phy oob settings to device-tree Michal Simek <michal.simek@xilinx.com> - 2017-08-04 15:20 +0200
[PATCH 1/9] devicetree: bindings: Add sata port phy config parameters in ahci-ceva Michal Simek <michal.simek@xilinx.com> - 2017-08-04 15:30 +0200
Re: [PATCH 1/9] devicetree: bindings: Add sata port phy config parameters in ahci-ceva Rob Herring <robh@kernel.org> - 2017-08-10 21:10 +0200
[PATCH 3/9] ata: ceva: Add gen 3 mode support in driver Michal Simek <michal.simek@xilinx.com> - 2017-08-04 15:30 +0200
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