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Groups > comp.lang.c++ > #91129
| From | "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> |
|---|---|
| Newsgroups | comp.lang.c++ |
| Subject | Re: aarch64 - 64-Bit ARM - return by value - GNU g++ inline assembler |
| Date | 2023-07-17 11:30 -0700 |
| Organization | A noiseless patient Spider |
| Message-ID | <u941bb$1akkc$1@dont-email.me> (permalink) |
| References | <74f0d07f-b1cd-42df-bf6d-fb0c701b3165n@googlegroups.com> <u93ml4$19efq$1@dont-email.me> <682ece22-d253-4254-9f9c-34b0f6d717cfn@googlegroups.com> |
On 7/17/2023 9:13 AM, Frederick Virchanza Gotham wrote: > On Monday, July 17, 2023 at 4:27:49 PM UTC+1, Bonita Montero wrote: >> >> Why not simply accept the ARM ABI for that ? >> For me it doesn't matter where the return value pointer is stored. > > > I'm writing a universal header file for all operating systems, all processors and all calling conventions, to invoke functions with guaranteed elision of copy/move operations when dealing with Named Return Value Optimisation. Currently the C++ Standard only mandates elision with RVO -- but not with NRVO. > > Since 99% of calling conventions work the same way, it makes sense to model my system on 99% of systems and to make aarch64 be the exception. So I will try get the aarch64 implementation to behave like all the others. I started a thread on the Standard Proposals mailing list: > > https://lists.isocpp.org/std-proposals/2023/07/7269.php > > But anyway I need to figure out how to use inline assembler get the value from the X8 register. It should be really simple but I can't get it to work. Make sure to have Intel syntax and GAS syntax versions. Not sure if that right for you, however, I needed to do that to handle different assemblers. MASM and GAS primarily. Generally, I stayed away from inline assembler and used externally assembled files.
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aarch64 - 64-Bit ARM - return by value - GNU g++ inline assembler Frederick Virchanza Gotham <cauldwell.thomas@gmail.com> - 2023-07-17 07:24 -0700
Re: aarch64 - 64-Bit ARM - return by value - GNU g++ inline assembler Bonita Montero <Bonita.Montero@gmail.com> - 2023-07-17 17:27 +0200
Re: aarch64 - 64-Bit ARM - return by value - GNU g++ inline assembler Frederick Virchanza Gotham <cauldwell.thomas@gmail.com> - 2023-07-17 09:13 -0700
Re: aarch64 - 64-Bit ARM - return by value - GNU g++ inline assembler Bonita Montero <Bonita.Montero@gmail.com> - 2023-07-17 18:21 +0200
Re: aarch64 - 64-Bit ARM - return by value - GNU g++ inline assembler "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2023-07-17 11:30 -0700
Re: aarch64 - 64-Bit ARM - return by value - GNU g++ inline assembler scott@slp53.sl.home (Scott Lurndal) - 2023-07-17 16:25 +0000
Re: aarch64 - 64-Bit ARM - return by value - GNU g++ inline assembler Frederick Virchanza Gotham <cauldwell.thomas@gmail.com> - 2023-07-17 10:00 -0700
Re: aarch64 - 64-Bit ARM - return by value - GNU g++ inline assembler scott@slp53.sl.home (Scott Lurndal) - 2023-07-17 17:07 +0000
Re: aarch64 - 64-Bit ARM - return by value - GNU g++ inline assembler Frederick Virchanza Gotham <cauldwell.thomas@gmail.com> - 2023-07-17 10:31 -0700
Re: aarch64 - 64-Bit ARM - return by value - GNU g++ inline assembler scott@slp53.sl.home (Scott Lurndal) - 2023-07-17 17:51 +0000
Re: aarch64 - 64-Bit ARM - return by value - GNU g++ inline assembler Bonita Montero <Bonita.Montero@gmail.com> - 2023-07-17 19:55 +0200
Re: aarch64 - 64-Bit ARM - return by value - GNU g++ inline assembler "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2023-07-17 11:34 -0700
Re: aarch64 - 64-Bit ARM - return by value - GNU g++ inline assembler Frederick Virchanza Gotham <cauldwell.thomas@gmail.com> - 2023-07-18 01:34 -0700
Re: aarch64 - 64-Bit ARM - return by value - GNU g++ inline assembler Frederick Virchanza Gotham <cauldwell.thomas@gmail.com> - 2023-07-18 03:55 -0700
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