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[PATCH v4 10/18] coresight tmc: Handle configuration types properly

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Coresight SoC 600 defines a new configuration for TMC, Embedded Trace
Streamer (ETS), indicated by 0x3 in MODE:CONFIG_TYPE. This would break
the existing driver which will treat anything other than ETR/ETB as an
ETF. Fix the driver to check the configuration type properly and also
add a warning if we encounter an unsupported configuration (ETS).

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
 drivers/hwtracing/coresight/coresight-tmc.c | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-tmc.c b/drivers/hwtracing/coresight/coresight-tmc.c
index 6bf4170..73184a1 100644
--- a/drivers/hwtracing/coresight/coresight-tmc.c
+++ b/drivers/hwtracing/coresight/coresight-tmc.c
@@ -358,11 +358,13 @@ static int tmc_probe(struct amba_device *adev, const struct amba_id *id)
 	desc.dev = dev;
 	desc.groups = coresight_tmc_groups;
 
-	if (drvdata->config_type == TMC_CONFIG_TYPE_ETB) {
+	switch (drvdata->config_type) {
+	case TMC_CONFIG_TYPE_ETB:
 		desc.type = CORESIGHT_DEV_TYPE_SINK;
 		desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER;
 		desc.ops = &tmc_etb_cs_ops;
-	} else if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
+		break;
+	case TMC_CONFIG_TYPE_ETR:
 		desc.type = CORESIGHT_DEV_TYPE_SINK;
 		desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER;
 		desc.ops = &tmc_etr_cs_ops;
@@ -373,10 +375,16 @@ static int tmc_probe(struct amba_device *adev, const struct amba_id *id)
 		ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(40));
 		if (ret)
 			goto out;
-	} else {
+		break;
+	case TMC_CONFIG_TYPE_ETF:
 		desc.type = CORESIGHT_DEV_TYPE_LINKSINK;
 		desc.subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_FIFO;
 		desc.ops = &tmc_etf_cs_ops;
+		break;
+	default:
+		pr_err("%s: Unsupported TMC config\n", pdata->name);
+		ret = -EINVAL;
+		goto out;
 	}
 
 	drvdata->csdev = coresight_register(&desc);
-- 
2.7.5

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[PATCH v4 00/18] coresight: Support for ARM Coresight SoC-600 Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-07-18 12:00 +0200
  [PATCH v4 01/18] coresight replicator: Cleanup programmable replicator naming Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-07-18 12:00 +0200
  [PATCH v4 07/18] coresight tmc: Add helpers for accessing 64bit registers Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-07-18 12:00 +0200
  [PATCH v4 10/18] coresight tmc: Handle configuration types properly Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-07-18 12:00 +0200
  [PATCH v4 13/18] coresight tmc etr: Detect address width at runtime Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-07-18 12:00 +0200
  [PATCH v4 15/18] coresigh tmc etr: Setup AXI cache encoding for read transfers Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-07-18 12:00 +0200
  [PATCH v4 06/18] coresight: Add support for reading 64bit registers Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-07-18 12:00 +0200
  [PATCH v4 11/18] coresight tmc etr: Add capabilitiy information Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-07-18 12:00 +0200
  [PATCH v4 08/18] coresight tmc: Expose DBA and AXICTL Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-07-18 12:00 +0200

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