Re: [PATCH V3 3/4] pwm: tegra: Add DT binding details to configure pin in suspends/resume

From	Jon Hunter <jonathanh@nvidia.com>
Newsgroups	linux.kernel
Subject	Re: [PATCH V3 3/4] pwm: tegra: Add DT binding details to configure pin in suspends/resume
Date	2017-04-06 17:30 +0200
Message-ID	<tthwe-2kW-17@gated-at.bofh.it> (permalink)
References	<ttgTv-1Cx-3@gated-at.bofh.it> <ttgTw-1Cx-19@gated-at.bofh.it>
Organization	linux.* mail to news gateway

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On 06/04/17 15:21, Laxman Dewangan wrote:
> In some of NVIDIA Tegra's platform, PWM controller is used to
> control the PWM controlled regulators. PWM signal is connected to
> the VID pin of the regulator where duty cycle of PWM signal decide
> the voltage level of the regulator output.
> 
> The tristate (high impedance of PWM pin form Tegra) also define

s/form/from/
s/define/defines/

> one of the state of PWM regulator which needs to be configure in
> suspend state of system.

It maybe clearer to say that when the system enters suspend the
regulator requires the pwm output to be tristated.

> Add DT binding details to provide the pin configuration state
> from PWM and pinctrl DT node in suspend and active state of
> the system.
> 
> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
> ---
> Changes from v1:
> - Use standard pinctrl names for sleep and active state.
> 
>  .../devicetree/bindings/pwm/nvidia,tegra20-pwm.txt | 43 ++++++++++++++++++++++
>  1 file changed, 43 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
> index b4e7377..4128cdc 100644
> --- a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
> +++ b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
> @@ -19,6 +19,19 @@ Required properties:
>  - reset-names: Must include the following entries:
>    - pwm
>  
> +Optional properties:
> +============================
> +In some of the interface like PWM based regulator device, it is required
> +to configure the pins differently in different states, especially in suspend
> +state of the system. The configuration of pin is provided via the pinctrl
> +DT node as detailed in the pinctrl DT binding document
> +	Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
> +
> +The PWM node will have following optional properties.
> +pinctrl-names:	Pin state names. Must be "default" and "sleep".
> +pinctrl-0:	Node handle for the default/active state of pi configurations.

s/pi/pin/
s/Node handle/phandle/

> +pinctrl-1:	Node handle for the sleep state of pin configurations.
> +
>  Example:
>  
>  	pwm: pwm@7000a000 {
> @@ -29,3 +42,33 @@ Example:
>  		resets = <&tegra_car 17>;
>  		reset-names = "pwm";
>  	};
> +
> +
> +Example with the pin configuration for suspend and resume:
> +=========================================================
> +Pin PE7 is used as PWM interface.

Nit-pick. On what devices? Sounds like this is verbatim. Maybe state
what device this is an example for.

Jon

-- 
nvpublic

Thread

[PATCH V3 3/4] pwm: tegra: Add DT binding details to configure pin in suspends/resume Laxman Dewangan <ldewangan@nvidia.com> - 2017-04-06 16:50 +0200
  Re: [PATCH V3 3/4] pwm: tegra: Add DT binding details to configure  pin in suspends/resume Jon Hunter <jonathanh@nvidia.com> - 2017-04-06 17:30 +0200
    Re: [PATCH V3 3/4] pwm: tegra: Add DT binding details to configure  pin in suspends/resume Laxman Dewangan <ldewangan@nvidia.com> - 2017-04-06 19:10 +0200
      Re: [PATCH V3 3/4] pwm: tegra: Add DT binding details to configure  pin in suspends/resume Jon Hunter <jonathanh@nvidia.com> - 2017-04-07 10:00 +0200

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