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Groups > linux.kernel > #1616908

[PATCH 1/3] dt: bindings: add pmu0 regs for USB PHYs on Allwinner H3/V3s/A64

From Icenowy Zheng <icenowy@aosc.io>
Newsgroups linux.kernel
Subject [PATCH 1/3] dt: bindings: add pmu0 regs for USB PHYs on Allwinner H3/V3s/A64
Date 2017-04-05 15:00 +0200
Message-ID <tsSHw-2II-25@gated-at.bofh.it> (permalink)
References <tsSHw-2II-23@gated-at.bofh.it>
Organization linux.* mail to news gateway

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From: Icenowy Zheng <icenowy@aosc.xyz>

Allwinner H3/V3s/A64 SoCs have a special USB PHY0 that can route to two
controllers: one is MUSB and the other is a EHCI/OHCI pair.

When it's routed to EHCI/OHCI pair, it will needs a "pmu0" regs to
tweak, like other EHCI/OHCI pairs in Allwinner SoCs.

Add this to the binding of USB PHYs on Allwinner H3/V3s/A64.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---

Kishon, could you push this to 4.11?

 Documentation/devicetree/bindings/phy/sun4i-usb-phy.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/phy/sun4i-usb-phy.txt b/Documentation/devicetree/bindings/phy/sun4i-usb-phy.txt
index e42334258185..005bc22938ff 100644
--- a/Documentation/devicetree/bindings/phy/sun4i-usb-phy.txt
+++ b/Documentation/devicetree/bindings/phy/sun4i-usb-phy.txt
@@ -15,6 +15,7 @@ Required properties:
 - reg : a list of offset + length pairs
 - reg-names :
   * "phy_ctrl"
+  * "pmu0" for H3, V3s and A64
   * "pmu1"
   * "pmu2" for sun4i, sun6i or sun7i
 - #phy-cells : from the generic phy bindings, must be 1
-- 
2.12.2

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Thread

[PATCH 0/3] Allwinner A64 EHCI0/OHCI0 devicetree change Icenowy Zheng <icenowy@aosc.io> - 2017-04-05 15:00 +0200
  [PATCH 1/3] dt: bindings: add pmu0 regs for USB PHYs on Allwinner H3/V3s/A64 Icenowy Zheng <icenowy@aosc.io> - 2017-04-05 15:00 +0200
    Re: [PATCH 1/3] dt: bindings: add pmu0 regs for USB PHYs on Allwinner  H3/V3s/A64 Kishon Vijay Abraham I <kishon@ti.com> - 2017-04-05 15:10 +0200
      Re: [PATCH 1/3] dt: bindings: add pmu0 regs for USB PHYs on Allwinner H3/V3s/A64 Chen-Yu Tsai <wens@csie.org> - 2017-04-05 18:20 +0200
  Re: [PATCH 2/3] arm64: allwinner: a64: add USB0 OHCI/EHCI related  devicetree parts Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-04-05 15:10 +0200
  [PATCH 3/3] arm64: allwinner: a64: enable EHCI0/OHCI0 controller for Pine64 Icenowy Zheng <icenowy@aosc.io> - 2017-04-05 15:30 +0200
  [PATCH 2/3] arm64: allwinner: a64: add USB0 OHCI/EHCI related devicetree parts Icenowy Zheng <icenowy@aosc.io> - 2017-04-05 15:30 +0200

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