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Groups > linux.kernel > #1616846
| From | "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [tip:x86/mm] x86/asm: Remove __VIRTUAL_MASK_SHIFT==47 assert |
| Date | 2017-04-05 13:20 +0200 |
| Message-ID | <tsR8J-1VT-9@gated-at.bofh.it> (permalink) |
| References | <tqDjA-3gZ-13@gated-at.bofh.it> <tssal-2oD-3@gated-at.bofh.it> <tsyIO-6H1-11@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Tue, Apr 04, 2017 at 05:36:33PM +0200, Denys Vlasenko wrote: > > diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S > > index 044d18e..f07b4ef 100644 > > --- a/arch/x86/entry/entry_64.S > > +++ b/arch/x86/entry/entry_64.S > > @@ -265,12 +265,9 @@ return_from_SYSCALL_64: > > * > > * If width of "canonical tail" ever becomes variable, this will need > > * to be updated to remain correct on both old and new CPUs. > > + * > > + * Change top 16 bits to be the sign-extension of 47th bit > > The comment above stops being correct: it's not necessary 16 top bits > we sign-extend now. With larger __VIRTUAL_MASK_SHIFT for 5-level translation, > it will become 7 bits (if I do the math right). Does the patch below look okay to you? > > */ > > - .ifne __VIRTUAL_MASK_SHIFT - 47 > > - .error "virtual address width changed -- SYSRET checks need update" > > - .endif > > - > > - /* Change top 16 bits to be the sign-extension of 47th bit */ > > shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx > > sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx > > The bigger problem here would be the future boot-time choice of 4/5-level > page tables: __VIRTUAL_MASK_SHIFT will need to depend on that choice, > but in this location it is preferable to not use any variables > (memory references). Yeah. Will see what I will be able to come up with. Not sure yet. -------------------8<---------------------- From 2433cf4f8847bbc41cc2b02d6af4f191b3b5a0c5 Mon Sep 17 00:00:00 2001 From: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> Date: Wed, 5 Apr 2017 14:06:15 +0300 Subject: [PATCH] x86/asm: Fix comment in return_from_SYSCALL_64 On x86-64 __VIRTUAL_MASK_SHIFT depends on paging mode now. Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> --- arch/x86/entry/entry_64.S | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S index 607d72c4a485..c70e064d9592 100644 --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -266,7 +266,8 @@ return_from_SYSCALL_64: * If width of "canonical tail" ever becomes variable, this will need * to be updated to remain correct on both old and new CPUs. * - * Change top 16 bits to be the sign-extension of 47th bit + * Change top bits to match most significant valuable bit (47 or 56 + * depending on paging mode) in the address. */ shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx -- Kirill A. Shutemov
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[PATCHv3 0/7] x86: 5-level paging enabling for v4.12, Part 3 "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-03-30 10:10 +0200
[PATCHv3 2/7] x86/asm: Remove __VIRTUAL_MASK_SHIFT==47 assert "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-03-30 10:10 +0200
[tip:x86/mm] x86/asm: Remove __VIRTUAL_MASK_SHIFT==47 assert "tip-bot for Kirill A. Shutemov" <tipbot@zytor.com> - 2017-04-04 10:40 +0200
Re: [tip:x86/mm] x86/asm: Remove __VIRTUAL_MASK_SHIFT==47 assert Denys Vlasenko <dvlasenk@redhat.com> - 2017-04-04 17:40 +0200
Re: [tip:x86/mm] x86/asm: Remove __VIRTUAL_MASK_SHIFT==47 assert "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-04-05 13:20 +0200
Re: [tip:x86/mm] x86/asm: Remove __VIRTUAL_MASK_SHIFT==47 assert Denys Vlasenko <dvlasenk@redhat.com> - 2017-04-05 14:00 +0200
Re: [tip:x86/mm] x86/asm: Remove __VIRTUAL_MASK_SHIFT==47 assert "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-04-05 14:10 +0200
[PATCHv3 3/7] x86/mm: Define virtual memory map for 5-level paging "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-03-30 10:10 +0200
[tip:x86/mm] x86/mm: Define virtual memory map for 5-level paging "tip-bot for Kirill A. Shutemov" <tipbot@zytor.com> - 2017-04-04 10:40 +0200
[PATCHv3 5/7] x86/mm: Add basic defines/helpers for CONFIG_X86_5LEVEL "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-03-30 10:10 +0200
[tip:x86/mm] x86/mm: Add basic defines/helpers for CONFIG_X86_5LEVEL=y "tip-bot for Kirill A. Shutemov" <tipbot@zytor.com> - 2017-04-04 10:40 +0200
[PATCHv3 7/7] x86/espfix: Add support 5-level paging "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-03-30 10:20 +0200
[tip:x86/mm] x86/espfix: Add support for 5-level paging "tip-bot for Kirill A. Shutemov" <tipbot@zytor.com> - 2017-04-04 10:40 +0200
[PATCHv3 6/7] x86/kasan: Extend to support 5-level paging "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-03-30 10:20 +0200
[tip:x86/mm] x86/kasan: Extend KASAN to support 5-level paging "tip-bot for Kirill A. Shutemov" <tipbot@zytor.com> - 2017-04-04 10:40 +0200
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