Re: [PATCH v6 08/11] drivers: perf: hisi: use poll method to avoid L3C counter overflow

From	Anurup M <anurupvasu@gmail.com>
Newsgroups	linux.kernel
Subject	Re: [PATCH v6 08/11] drivers: perf: hisi: use poll method to avoid L3C counter overflow
Date	2017-03-27 08:40 +0200
Message-ID	<tpwtQ-3Lz-13@gated-at.bofh.it> (permalink)
References	<tjmdQ-87B-19@gated-at.bofh.it> <tnvBU-6kG-17@gated-at.bofh.it> <torcR-5YR-5@gated-at.bofh.it> <tow2S-10z-7@gated-at.bofh.it>
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On Friday 24 March 2017 05:13 PM, Mark Rutland wrote:
>>> How do we ensure that we don't take the interrupt in the middle of a
>>> > >sequence of accesses to the HW?
>> >
>> >The L3 cache and MN PMU does not use the overflow IRQ and it does
>> >not occur here
>> >as the interrupt Mask register is by default masked in hardware.
> I was referring to the timer interrupt which backs the hrtimer.
>
> i.e. how do we guarantee that hisi_hrtimer_callback() is not called
> while we are in the middle of a RMW sequence? Are interrupts disabled
> for all of those seqeunces?

The HW access via djtag read and write are protected by spin_lock_irqsave.

Thanks,
Anurup

> Thanks,
> Mark.

Thread

Re: [PATCH v6 08/11] drivers: perf: hisi: use poll method to avoid  L3C counter overflow Mark Rutland <mark.rutland@arm.com> - 2017-03-21 18:20 +0100
  Re: [PATCH v6 08/11] drivers: perf: hisi: use poll method to avoid  L3C counter overflow Anurup M <anurupvasu@gmail.com> - 2017-03-24 07:50 +0100
    Re: [PATCH v6 08/11] drivers: perf: hisi: use poll method to avoid  L3C counter overflow Mark Rutland <mark.rutland@arm.com> - 2017-03-24 13:00 +0100
      Re: [PATCH v6 08/11] drivers: perf: hisi: use poll method to avoid  L3C counter overflow Anurup M <anurupvasu@gmail.com> - 2017-03-27 08:40 +0200
        Re: [PATCH v6 08/11] drivers: perf: hisi: use poll method to avoid  L3C counter overflow Mark Rutland <mark.rutland@arm.com> - 2017-03-28 13:20 +0200

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