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Groups > linux.kernel > #1601460
| From | <gabriel.fernandez@st.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH 0/2] STM32F4 clock fixes |
| Date | 2017-03-15 15:50 +0100 |
| Message-ID | <tlips-wL-7@gated-at.bofh.it> (permalink) |
| Organization | linux.* mail to news gateway |
From: Gabriel Fernandez <gabriel.fernandez@st.com> This patch-set contains 2 fixes. One concerning exclusion of wrong values for PLLQ (0 & 1) And the second is a fix about timeout management of PLL and LSE/LSI clocks. Gabriel Fernandez (2): clk: stm32f4: fix: exclude values 0 and 1 for PLLQ clk: stm32f4: fix timeout management for pll and ready gate drivers/clk/clk-stm32f4.c | 56 +++++++++++++++++++++++++++++++++-------------- 1 file changed, 39 insertions(+), 17 deletions(-) -- 1.9.1
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[PATCH 0/2] STM32F4 clock fixes <gabriel.fernandez@st.com> - 2017-03-15 15:50 +0100
[PATCH 2/2] clk: stm32f4: fix timeout management for pll and ready gate <gabriel.fernandez@st.com> - 2017-03-15 15:50 +0100
Re: [PATCH 0/2] STM32F4 clock fixes Stephen Boyd <sboyd@codeaurora.org> - 2017-03-15 21:50 +0100
Re: [PATCH 0/2] STM32F4 clock fixes Gabriel Fernandez <gabriel.fernandez@st.com> - 2017-03-16 09:20 +0100
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