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Groups > linux.kernel > #1600083
| From | Ingo Molnar <mingo@kernel.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 0/6] x86: 5-level paging enabling for v4.12, Part 1 |
| Date | 2017-03-14 08:50 +0100 |
| Message-ID | <tkPnr-5fN-5@gated-at.bofh.it> (permalink) |
| References | <tkziG-1PZ-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
* Kirill A. Shutemov <kirill.shutemov@linux.intel.com> wrote: > Here's the first bunch of patches of 5-level patchset. Let's see if I'm on > right track addressing Ingo's feedback. :) > > These patches prepare x86 code to be switched from <asm-generic/5level-fixup> > to <asm-generic/pgtable-nop4d.h>. It's a stepping stone for adding 5-level > paging support. > > Please review and consider applying. > > Kirill A. Shutemov (6): > x86/mm: Extend headers with basic definitions to support 5-level > paging > x86/mm: Convert trivial cases of page table walk to 5-level paging > x86/gup: Add 5-level paging support > x86/ident_map: Add 5-level paging support > x86/vmalloc: Add 5-level paging support > x86/power: Add 5-level paging support > > arch/x86/include/asm/pgtable-2level_types.h | 1 + > arch/x86/include/asm/pgtable-3level_types.h | 1 + > arch/x86/include/asm/pgtable.h | 26 +++++++++--- > arch/x86/include/asm/pgtable_64_types.h | 1 + > arch/x86/include/asm/pgtable_types.h | 30 ++++++++++++- > arch/x86/kernel/tboot.c | 6 ++- > arch/x86/kernel/vm86_32.c | 6 ++- > arch/x86/mm/fault.c | 66 +++++++++++++++++++++++++---- > arch/x86/mm/gup.c | 33 ++++++++++++--- > arch/x86/mm/ident_map.c | 51 +++++++++++++++++++--- > arch/x86/mm/init_32.c | 22 +++++++--- > arch/x86/mm/ioremap.c | 3 +- > arch/x86/mm/pgtable.c | 4 +- > arch/x86/mm/pgtable_32.c | 8 +++- > arch/x86/platform/efi/efi_64.c | 13 ++++-- > arch/x86/power/hibernate_32.c | 7 ++- > arch/x86/power/hibernate_64.c | 50 ++++++++++++++++------ > 17 files changed, 269 insertions(+), 59 deletions(-) Much better! I've applied them, with (very) minor readability edits here and there, and will push them out into tip:x86/mm and tip:master after some testing - you can use that as a base for the remaining submissions. I've also applied the GUP patch, with the assumption that you'll address Linus's request to switch x86 over to the generic version. Thanks, Ingo
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[PATCH 0/6] x86: 5-level paging enabling for v4.12, Part 1 "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-03-13 15:40 +0100
[PATCH 4/6] x86/ident_map: Add 5-level paging support "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-03-13 15:40 +0100
[tip:x86/mm] x86/mm/ident_map: Add 5-level paging support "tip-bot for Kirill A. Shutemov" <tipbot@zytor.com> - 2017-03-14 10:50 +0100
[PATCH 1/6] x86/mm: Extend headers with basic definitions to support 5-level paging "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-03-13 15:40 +0100
[tip:x86/mm] x86/mm: Extend headers with basic definitions to support 5-level paging "tip-bot for Kirill A. Shutemov" <tipbot@zytor.com> - 2017-03-14 10:50 +0100
[PATCH 5/6] x86/vmalloc: Add 5-level paging support "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-03-13 15:40 +0100
[tip:x86/mm] x86/mm/vmalloc: Add 5-level paging support "tip-bot for Kirill A. Shutemov" <tipbot@zytor.com> - 2017-03-14 10:50 +0100
[PATCH 3/6] x86/gup: Add 5-level paging support "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-03-13 15:40 +0100
[tip:x86/mm] x86/mm/gup: Add 5-level paging support "tip-bot for Kirill A. Shutemov" <tipbot@zytor.com> - 2017-03-14 10:50 +0100
[PATCH 6/6] x86/power: Add 5-level paging support "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-03-13 15:40 +0100
[tip:x86/mm] x86/power: Add 5-level paging support "tip-bot for Kirill A. Shutemov" <tipbot@zytor.com> - 2017-03-14 10:50 +0100
[PATCH 2/6] x86/mm: Convert trivial cases of page table walk to 5-level paging "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-03-13 15:40 +0100
[tip:x86/mm] x86/mm: Convert trivial cases of page table walk to 5-level paging "tip-bot for Kirill A. Shutemov" <tipbot@zytor.com> - 2017-03-14 10:40 +0100
Re: [PATCH 0/6] x86: 5-level paging enabling for v4.12, Part 1 Linus Torvalds <torvalds@linux-foundation.org> - 2017-03-13 20:50 +0100
Re: [PATCH 0/6] x86: 5-level paging enabling for v4.12, Part 1 Ingo Molnar <mingo@kernel.org> - 2017-03-14 08:50 +0100
Re: [PATCH 0/6] x86: 5-level paging enabling for v4.12, Part 1 "Kirill A. Shutemov" <kirill@shutemov.name> - 2017-03-14 09:30 +0100
Re: [PATCH 0/6] x86: 5-level paging enabling for v4.12, Part 1 Thomas Gleixner <tglx@linutronix.de> - 2017-03-14 09:40 +0100
Re: [PATCH 0/6] x86: 5-level paging enabling for v4.12, Part 1 Linus Torvalds <torvalds@linux-foundation.org> - 2017-03-14 18:50 +0100
Re: [PATCH 0/6] x86: 5-level paging enabling for v4.12, Part 1 "Kirill A. Shutemov" <kirill@shutemov.name> - 2017-03-18 18:10 +0100
Re: [PATCH 0/6] x86: 5-level paging enabling for v4.12, Part 1 "Kirill A. Shutemov" <kirill@shutemov.name> - 2017-03-18 18:10 +0100
Re: [PATCH 0/6] x86: 5-level paging enabling for v4.12, Part 1 Michal Hocko <mhocko@kernel.org> - 2017-03-15 10:30 +0100
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