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Groups > linux.kernel > #1673872
| From | Willy Wolff <willy.mh.wolff@gmail.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH] ARM: dts: exynos: Exynos5422 Odroid-XU* incomplete thermal-zones definition |
| Date | 2017-06-23 23:10 +0200 |
| Message-ID | <tVE02-7gU-15@gated-at.bofh.it> (permalink) |
| Organization | linux.* mail to news gateway |
Odroid XU*-familly boards has thermal sensors per A15 cores, but the actual
thermal-zones define only cooling-maps action for cpu0.
If the application is running on all cores but core4 (first core of the A15
cluster), the CPU can reach high temperature without any proper cooling
action.
As already discus in prior mail, and on IRC, it's a quit big code
duplication, but I don't found the write way to express that in a better
way.
The situation for this board is that we have multiple sensors, but
matching cooling devices for these sensors act for the same physical
device (FAN and A15 cluster, as each core of the cluster share the same
frequency).
In fact, of-thermal.c:473:thermal_zone_of_sensor_register() can't use
multiple sensors for one single thermal zone.
This patch follow the path taken in arch/arm/boot/dts/qcom-apq8084.dtsi:97
I'm interested to extending the thermal driver, but it will takes time.
So this is a workaround before refactoring the driver.
If somebody knows how to write it better, any advice and suggestions
are more than welcome.
Also, the comment for cpu_alert4 in cooling-maps definition is not
accurate, 11 steps for A15 correspond to 700MHz, not 600MHz.
Signed-off-by: Willy Wolff <willy.mh.wolff@gmail.com>
---
arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 249 +++++++++++++++++++--
1 file changed, 231 insertions(+), 18 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
index 05b9afdd6757..0759cc0812fb 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
@@ -64,22 +64,22 @@
polling-delay-passive = <250>;
polling-delay = <0>;
trips {
- cpu_alert0: cpu-alert-0 {
+ cpu0_alert0: cpu-alert-0 {
temperature = <50000>; /* millicelsius */
hysteresis = <5000>; /* millicelsius */
type = "active";
};
- cpu_alert1: cpu-alert-1 {
+ cpu0_alert1: cpu-alert-1 {
temperature = <60000>; /* millicelsius */
hysteresis = <5000>; /* millicelsius */
type = "active";
};
- cpu_alert2: cpu-alert-2 {
+ cpu0_alert2: cpu-alert-2 {
temperature = <70000>; /* millicelsius */
hysteresis = <5000>; /* millicelsius */
type = "active";
};
- cpu_crit0: cpu-crit-0 {
+ cpu0_crit0: cpu-crit-0 {
temperature = <120000>; /* millicelsius */
hysteresis = <0>; /* millicelsius */
type = "critical";
@@ -88,14 +88,14 @@
* Exynos542x supports only 4 trip-points
* so for these polling mode is required.
* Start polling at temperature level of last
- * interrupt-driven trip: cpu_alert2
+ * interrupt-driven trip: cpu0_alert2
*/
- cpu_alert3: cpu-alert-3 {
+ cpu0_alert3: cpu-alert-3 {
temperature = <70000>; /* millicelsius */
hysteresis = <10000>; /* millicelsius */
type = "passive";
};
- cpu_alert4: cpu-alert-4 {
+ cpu0_alert4: cpu-alert-4 {
temperature = <85000>; /* millicelsius */
hysteresis = <10000>; /* millicelsius */
type = "passive";
@@ -104,43 +104,256 @@
};
cooling-maps {
map0 {
- trip = <&cpu_alert0>;
+ trip = <&cpu0_alert0>;
cooling-device = <&fan0 0 1>;
};
map1 {
- trip = <&cpu_alert1>;
+ trip = <&cpu0_alert1>;
cooling-device = <&fan0 1 2>;
};
map2 {
- trip = <&cpu_alert2>;
+ trip = <&cpu0_alert2>;
cooling-device = <&fan0 2 3>;
};
/*
- * When reaching cpu_alert3, reduce CPU
+ * When reaching cpu0_alert3, reduce CPU
* by 2 steps. On Exynos5422/5800 that would
* be: 1600 MHz and 1100 MHz.
*/
map3 {
- trip = <&cpu_alert3>;
+ trip = <&cpu0_alert3>;
cooling-device = <&cpu0 0 2>;
};
map4 {
- trip = <&cpu_alert3>;
+ trip = <&cpu0_alert3>;
cooling-device = <&cpu4 0 2>;
};
/*
- * When reaching cpu_alert4, reduce CPU
- * further, down to 600 MHz (11 steps for big,
+ * When reaching cpu0_alert4, reduce CPU
+ * further, down to 600 MHz (12 steps for big,
* 7 steps for LITTLE).
*/
map5 {
- trip = <&cpu_alert4>;
+ trip = <&cpu0_alert4>;
cooling-device = <&cpu0 3 7>;
};
map6 {
- trip = <&cpu_alert4>;
- cooling-device = <&cpu4 3 11>;
+ trip = <&cpu0_alert4>;
+ cooling-device = <&cpu4 3 12>;
+ };
+ };
+ };
+ cpu1_thermal: cpu1-thermal {
+ thermal-sensors = <&tmu_cpu1 0>;
+ polling-delay-passive = <250>;
+ polling-delay = <0>;
+ trips {
+ cpu1_alert0: cpu-alert-0 {
+ temperature = <50000>;
+ hysteresis = <5000>;
+ type = "active";
+ };
+ cpu1_alert1: cpu-alert-1 {
+ temperature = <60000>;
+ hysteresis = <5000>;
+ type = "active";
+ };
+ cpu1_alert2: cpu-alert-2 {
+ temperature = <70000>;
+ hysteresis = <5000>;
+ type = "active";
+ };
+ cpu1_crit0: cpu-crit-0 {
+ temperature = <120000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+
+ cpu1_alert3: cpu-alert-3 {
+ temperature = <70000>;
+ hysteresis = <10000>; /* millicelsius */
+ type = "passive";
+ };
+ cpu1_alert4: cpu-alert-4 {
+ temperature = <85000>;
+ hysteresis = <10000>;
+ type = "passive";
+ };
+
+ };
+ cooling-maps {
+ map0 {
+ trip = <&cpu1_alert0>;
+ cooling-device = <&fan0 0 1>;
+ };
+ map1 {
+ trip = <&cpu1_alert1>;
+ cooling-device = <&fan0 1 2>;
+ };
+ map2 {
+ trip = <&cpu1_alert2>;
+ cooling-device = <&fan0 2 3>;
+ };
+
+ map3 {
+ trip = <&cpu1_alert3>;
+ cooling-device = <&cpu0 0 2>;
+ };
+ map4 {
+ trip = <&cpu1_alert3>;
+ cooling-device = <&cpu4 0 2>;
+ };
+
+ map5 {
+ trip = <&cpu1_alert4>;
+ cooling-device = <&cpu0 3 7>;
+ };
+ map6 {
+ trip = <&cpu1_alert4>;
+ cooling-device = <&cpu4 3 12>;
+ };
+ };
+ };
+ cpu2_thermal: cpu2-thermal {
+ thermal-sensors = <&tmu_cpu2 0>;
+ polling-delay-passive = <250>;
+ polling-delay = <0>;
+ trips {
+ cpu2_alert0: cpu-alert-0 {
+ temperature = <50000>;
+ hysteresis = <5000>;
+ type = "active";
+ };
+ cpu2_alert1: cpu-alert-1 {
+ temperature = <60000>;
+ hysteresis = <5000>;
+ type = "active";
+ };
+ cpu2_alert2: cpu-alert-2 {
+ temperature = <70000>;
+ hysteresis = <5000>;
+ type = "active";
+ };
+ cpu2_crit0: cpu-crit-0 {
+ temperature = <120000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+
+ cpu2_alert3: cpu-alert-3 {
+ temperature = <70000>;
+ hysteresis = <10000>;
+ type = "passive";
+ };
+ cpu2_alert4: cpu-alert-4 {
+ temperature = <85000>;
+ hysteresis = <10000>;
+ type = "passive";
+ };
+
+ };
+ cooling-maps {
+ map0 {
+ trip = <&cpu2_alert0>;
+ cooling-device = <&fan0 0 1>;
+ };
+ map1 {
+ trip = <&cpu2_alert1>;
+ cooling-device = <&fan0 1 2>;
+ };
+ map2 {
+ trip = <&cpu2_alert2>;
+ cooling-device = <&fan0 2 3>;
+ };
+
+ map3 {
+ trip = <&cpu2_alert3>;
+ cooling-device = <&cpu0 0 2>;
+ };
+ map4 {
+ trip = <&cpu2_alert3>;
+ cooling-device = <&cpu4 0 2>;
+ };
+
+ map5 {
+ trip = <&cpu2_alert4>;
+ cooling-device = <&cpu0 3 7>;
+ };
+ map6 {
+ trip = <&cpu2_alert4>;
+ cooling-device = <&cpu4 3 12>;
+ };
+ };
+ };
+ cpu3_thermal: cpu3-thermal {
+ thermal-sensors = <&tmu_cpu3 0>;
+ polling-delay-passive = <250>;
+ polling-delay = <0>;
+ trips {
+ cpu3_alert0: cpu-alert-0 {
+ temperature = <50000>;
+ hysteresis = <5000>;
+ type = "active";
+ };
+ cpu3_alert1: cpu-alert-1 {
+ temperature = <60000>;
+ hysteresis = <5000>;
+ type = "active";
+ };
+ cpu3_alert2: cpu-alert-2 {
+ temperature = <70000>;
+ hysteresis = <5000>;
+ type = "active";
+ };
+ cpu3_crit0: cpu-crit-0 {
+ temperature = <120000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+
+ cpu3_alert3: cpu-alert-3 {
+ temperature = <70000>;
+ hysteresis = <10000>;
+ type = "passive";
+ };
+ cpu3_alert4: cpu-alert-4 {
+ temperature = <85000>;
+ hysteresis = <10000>;
+ type = "passive";
+ };
+
+ };
+ cooling-maps {
+ map0 {
+ trip = <&cpu3_alert0>;
+ cooling-device = <&fan0 0 1>;
+ };
+ map1 {
+ trip = <&cpu3_alert1>;
+ cooling-device = <&fan0 1 2>;
+ };
+ map2 {
+ trip = <&cpu3_alert2>;
+ cooling-device = <&fan0 2 3>;
+ };
+
+ map3 {
+ trip = <&cpu3_alert3>;
+ cooling-device = <&cpu0 0 2>;
+ };
+ map4 {
+ trip = <&cpu3_alert3>;
+ cooling-device = <&cpu4 0 2>;
+ };
+
+ map5 {
+ trip = <&cpu3_alert4>;
+ cooling-device = <&cpu0 3 7>;
+ };
+ map6 {
+ trip = <&cpu3_alert4>;
+ cooling-device = <&cpu4 3 12>;
};
};
};
--
2.11.0
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[PATCH] ARM: dts: exynos: Exynos5422 Odroid-XU* incomplete thermal-zones definition Willy Wolff <willy.mh.wolff@gmail.com> - 2017-06-23 23:10 +0200
Re: [PATCH] ARM: dts: exynos: Exynos5422 Odroid-XU* incomplete thermal-zones definition Krzysztof Kozlowski <krzk@kernel.org> - 2017-06-25 10:00 +0200
Re: [PATCH] ARM: dts: exynos: Exynos5422 Odroid-XU* incomplete thermal-zones definition Anand Moon <linux.amoon@gmail.com> - 2017-06-25 15:30 +0200
Re: [PATCH] ARM: dts: exynos: Exynos5422 Odroid-XU* incomplete thermal-zones definition Krzysztof Kozlowski <krzk@kernel.org> - 2017-06-25 15:40 +0200
Re: [PATCH] ARM: dts: exynos: Exynos5422 Odroid-XU* incomplete thermal-zones definition Anand Moon <linux.amoon@gmail.com> - 2017-06-25 17:20 +0200
Re: [PATCH] ARM: dts: exynos: Exynos5422 Odroid-XU* incomplete thermal-zones definition Krzysztof Kozlowski <krzk@kernel.org> - 2017-06-25 17:30 +0200
Re: [PATCH] ARM: dts: exynos: Exynos5422 Odroid-XU* incomplete thermal-zones definition Anand Moon <linux.amoon@gmail.com> - 2017-06-25 19:00 +0200
Re: [PATCH] ARM: dts: exynos: Exynos5422 Odroid-XU* incomplete thermal-zones definition Krzysztof Kozlowski <krzk@kernel.org> - 2017-06-25 19:20 +0200
Re: [PATCH] ARM: dts: exynos: Exynos5422 Odroid-XU* incomplete thermal-zones definition Anand Moon <linux.amoon@gmail.com> - 2017-06-25 20:10 +0200
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