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Groups > linux.kernel > #1577237

[PATCH 07/10] clocksource/drivers/arm_arch_timer: Add dt binding for hisilicon-161010101 erratum

From Daniel Lezcano <daniel.lezcano@linaro.org>
Newsgroups linux.kernel
Subject [PATCH 07/10] clocksource/drivers/arm_arch_timer: Add dt binding for hisilicon-161010101 erratum
Date 2017-02-09 02:00 +0100
Message-ID <t8LfB-7rl-27@gated-at.bofh.it> (permalink)
References <t8JGN-6E5-9@gated-at.bofh.it> <t8JGN-6E5-13@gated-at.bofh.it>
Organization linux.* mail to news gateway

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From: Ding Tianhong <dingtianhong@huawei.com>

This erratum describes a bug in logic outside the core, so MIDR can't be
used to identify its presence, and reading an SoC-specific revision
register from common arch timer code would be awkward.  So, describe it
in the device tree.

Signed-off-by: Ding Tianhong <dingtianhong@huawei.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 Documentation/devicetree/bindings/arm/arch_timer.txt | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt
index ad440a2..e926aea 100644
--- a/Documentation/devicetree/bindings/arm/arch_timer.txt
+++ b/Documentation/devicetree/bindings/arm/arch_timer.txt
@@ -31,6 +31,12 @@ to deliver its interrupts via SPIs.
   This also affects writes to the tval register, due to the implicit
   counter read.
 
+- hisilicon,erratum-161010101 : A boolean property. Indicates the
+  presence of Hisilicon erratum 161010101, which says that reading the
+  counters is unreliable in some cases, and reads may return a value 32
+  beyond the correct value. This also affects writes to the tval
+  registers, due to the implicit counter read.
+
 ** Optional properties:
 
 - arm,cpu-registers-not-fw-configured : Firmware does not initialize
-- 
2.7.4

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Thread

[GIT PULL] clockevents for 4.11 Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-02-09 00:20 +0100
  [PATCH 04/10] clocksource/drivers/tcb_clksrc: Use 32 bit tcb as sched_clock Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-02-09 00:20 +0100
  [PATCH 03/10] clocksource/drivers/gemini: Add driver for the Cortina Gemini Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-02-09 00:20 +0100
  [PATCH 05/10] clocksource/drivers/ostm: Document renesas-ostm timer DT bindings Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-02-09 00:20 +0100
  [PATCH 08/10] clocksource/drivers/arm_arch_timer: Remove fsl-a008585 parameter Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-02-09 00:30 +0100
  [PATCH 10/10] clocksource/drivers/arm_arch_timer: Work around Hisilicon erratum 161010101 Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-02-09 00:30 +0100
  [PATCH 01/10] clockevents: Add a clkevt-of mechanism like clksrc-of Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-02-09 00:30 +0100
    [PATCH 06/10] clocksource/drivers/ostm: Add renesas-ostm timer driver Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-02-09 01:20 +0100
    [PATCH 02/10] clocksource: add DT bindings for Cortina Gemini Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-02-09 01:30 +0100
    [PATCH 09/10] clocksource/drivers/arm_arch_timer: Introduce generic errata handling infrastructure Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-02-09 02:00 +0100
    [PATCH 07/10] clocksource/drivers/arm_arch_timer: Add dt binding for hisilicon-161010101 erratum Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-02-09 02:00 +0100

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