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Re: [PATCH v3] gpio: aspeed: Add banks Y, Z, AA, AB and AC

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On Fri, Jan 27, 2017 at 3:24 PM, Andrew Jeffery <andrew@aj.id.au> wrote:
> This is less straight-forward than one would hope, as some banks only
> have 4 pins rather than 8, others are output only, yet more (W and
> X, already supported) are input-only, and in the case of the g4 SoC bank
> AC doesn't exist.
>
> Add some structs to describe the varying properties of different banks
> and integrate mechanisms to deny requests for unsupported
> configurations.
>
> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>

Acked-by: Joel Stanley <joel@jms.id.au>

Cheers,

Joel

> ---
>
> Since v2:
>
> Drop linux/gpio.h include and change away from using GPIOF_* macros
>
> Since v1:
>
> Fix types for for_each_clear_bit() iteration
>
>  drivers/gpio/gpio-aspeed.c | 173 +++++++++++++++++++++++++++++++++++++++++----
>  1 file changed, 159 insertions(+), 14 deletions(-)

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[PATCH v3] gpio: aspeed: Add banks Y, Z, AA, AB and AC Andrew Jeffery <andrew@aj.id.au> - 2017-01-27 05:30 +0100
  Re: [PATCH v3] gpio: aspeed: Add banks Y, Z, AA, AB and AC Joel Stanley <joel@jms.id.au> - 2017-01-27 07:10 +0100

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