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Groups > linux.kernel > #1561290
| From | Chunfeng Yun <chunfeng.yun@mediatek.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH 4/6] arm64: dts: mt8173: add a new reference clock for usb3 analog phy |
| Date | 2017-01-18 07:00 +0100 |
| Message-ID | <t0RrP-52-17@gated-at.bofh.it> (permalink) |
| References | <t0RrP-52-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
add a new reference clock which comes from 26M oscillator directly
for SuperSpeed analog phy. and the old one which comes for PLL is
48M for HighSpeed analog phy.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 12e7027..5d1663b 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -754,8 +754,8 @@
u3phy: usb-phy@11290000 {
compatible = "mediatek,mt8173-u3phy";
reg = <0 0x11290000 0 0x800>;
- clocks = <&apmixedsys CLK_APMIXED_REF2USB_TX>;
- clock-names = "u3phya_ref";
+ clocks = <&apmixedsys CLK_APMIXED_REF2USB_TX>, <&clk26m>;
+ clock-names = "u2ref_clk", "u3ref_clk";
#address-cells = <2>;
#size-cells = <2>;
ranges;
--
1.7.9.5
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[PATCH 1/6] phy: phy-mt65xx-usb3: add reference clock of usb3 analog phy Chunfeng Yun <chunfeng.yun@mediatek.com> - 2017-01-18 07:00 +0100 [PATCH 4/6] arm64: dts: mt8173: add a new reference clock for usb3 analog phy Chunfeng Yun <chunfeng.yun@mediatek.com> - 2017-01-18 07:00 +0100 [PATCH 3/6] phy: phy-mt65xx-usb3: add support for mt2712 platform Chunfeng Yun <chunfeng.yun@mediatek.com> - 2017-01-18 07:00 +0100
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