[PATCH 2/4] MIPS: Remove FIR from ISA I FP signal context

From	"Maciej W. Rozycki" <macro@imgtec.com>
Newsgroups	linux.kernel
Subject	[PATCH 2/4] MIPS: Remove FIR from ISA I FP signal context
Date	2016-10-31 17:30 +0100
Message-ID	<synDc-4Pf-31@gated-at.bofh.it> (permalink)
References	<synDb-4Pf-13@gated-at.bofh.it>
Organization	linux.* mail to news gateway

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Complement commit e50c0a8fa60d ("Support the MIPS32 / MIPS64 DSP ASE.") 
and remove the Floating Point Implementation Register (FIR) from the FP 
register set recorded in a signal context with MIPS I processors too, in 
line with the change applied to r4k_fpu.S.

The `sc_fpc_eir' slot is unused according to our current ABI and the FIR 
register is read-only and always directly accessible from user software.

Signed-off-by: Maciej W. Rozycki <macro@imgtec.com>
---
linux-mips-isa1-sig-fp-context-dsp.patch
Index: linux-sfr-test/arch/mips/kernel/r2300_fpu.S
===================================================================
--- linux-sfr-test.orig/arch/mips/kernel/r2300_fpu.S	2016-10-22 02:17:38.000000000 +0100
+++ linux-sfr-test/arch/mips/kernel/r2300_fpu.S	2016-10-22 02:19:40.565112000 +0100
@@ -64,13 +64,9 @@ LEAF(_save_fp_context)
 	EX(swc1 $f29,(SC_FPREGS+232)(a0))
 	EX(swc1 $f30,(SC_FPREGS+240)(a0))
 	EX(swc1 $f31,(SC_FPREGS+248)(a0))
-	EX(sw	t1,(SC_FPC_CSR)(a0))
-	cfc1	t0,$0				# implementation/version
 	jr	ra
+	 EX(sw	t1,(SC_FPC_CSR)(a0))
 	.set	pop
-	.set	nomacro
-	 EX(sw	t0,(SC_FPC_EIR)(a0))
-	.set	macro
 	END(_save_fp_context)
 
 /*

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[PATCH 2/4] MIPS: Remove FIR from ISA I FP signal context "Maciej W. Rozycki" <macro@imgtec.com> - 2016-10-31 17:30 +0100

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