Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]


Groups > linux.kernel > #1477534

[PATCH 03/15] hisi_sas: keep CHL_INT2 masked for v2 HW

From John Garry <john.garry@huawei.com>
Newsgroups linux.kernel
Subject [PATCH 03/15] hisi_sas: keep CHL_INT2 masked for v2 HW
Date 2016-09-06 17:30 +0200
Message-ID <seqtZ-3JB-71@gated-at.bofh.it> (permalink)
References <seqtX-3JB-13@gated-at.bofh.it>
Organization linux.* mail to news gateway

Show all headers | View raw


None of the CHL_INT2 interrupts are serviced
in the channel irq ISR, so leave the interrupt
source masked.
The interrupt mask is initially set in
init_reg_v2_hw().

Signed-off-by: John Garry <john.garry@huawei.com>
---
 drivers/scsi/hisi_sas/hisi_sas_v2_hw.c | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
index e0c124b..25e7c58 100644
--- a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
+++ b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
@@ -965,14 +965,8 @@ static void start_phys_v2_hw(unsigned long data)
 
 static void phys_init_v2_hw(struct hisi_hba *hisi_hba)
 {
-	int i;
 	struct timer_list *timer = &hisi_hba->timer;
 
-	for (i = 0; i < hisi_hba->n_phy; i++) {
-		hisi_sas_phy_write32(hisi_hba, i, CHL_INT2_MSK, 0x6a);
-		hisi_sas_phy_read32(hisi_hba, i, CHL_INT2_MSK);
-	}
-
 	setup_timer(timer, start_phys_v2_hw, (unsigned long)hisi_hba);
 	mod_timer(timer, jiffies + HZ);
 }
-- 
1.9.1

Back to linux.kernel | Previous | Next | Find similar | Unroll thread


Thread

[PATCH 03/15] hisi_sas: keep CHL_INT2 masked for v2 HW John Garry <john.garry@huawei.com> - 2016-09-06 17:30 +0200

csiph-web