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Re: [PATCH V2 1/4] ARM64 LPC: Indirect ISA port IO introduced

From Arnd Bergmann <arnd@arndb.de>
Newsgroups linux.kernel
Subject Re: [PATCH V2 1/4] ARM64 LPC: Indirect ISA port IO introduced
Date 2016-09-07 17:10 +0200
Message-ID <seME9-1mo-3@gated-at.bofh.it> (permalink)
References <seKVH-db-1@gated-at.bofh.it> <seKVJ-db-53@gated-at.bofh.it>
Organization linux.* mail to news gateway

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On Wednesday, September 7, 2016 9:33:50 PM CEST Zhichang Yuan wrote:
> +#ifdef CONFIG_ARM64_INDIRECT_PIO
> +
> +typedef u64 (*inhook)(void *devobj, unsigned long ptaddr, void *inbuf,
> +                               size_t dlen, unsigned int count);
> +typedef void (*outhook)(void *devobj, unsigned long ptaddr,
> +                               const void *outbuf, size_t dlen,
> +                               unsigned int count);
> +
> +struct extio_ops {
> +       inhook  pfin;
> +       outhook pfout;
> +       void *devpara;
> +};
> +
> +extern struct extio_ops *arm64_simops __refdata;
> +
> +/*Up to now, only applied to Hip06 LPC. Define as static here.*/
> +static inline void arm64_set_simops(struct extio_ops *ops)
> +{
> +       if (ops)
> +               WRITE_ONCE(arm64_simops, ops);
> +}
> +
> +
> +#define BUILDIO(bw, type)                                              \
> +static inline type in##bw(unsigned long addr)                          \
> +{                                                                      \
> +       if (addr >= PCIBIOS_MIN_IO)                                     \
> +               return read##bw(PCI_IOBASE + addr);                     \
> +       return (arm64_simops && arm64_simops->pfin) ?                   \
> +               arm64_simops->pfin(arm64_simops->devpara, addr, NULL,   \
> +                                       sizeof(type), 1) : -1;          \
> +}                                                      \
> 

Hmm, the way this is done, enabling CONFIG_ARM64_INDIRECT_PIO at
compile time means that only the dynamically registered PIO support
is possible for I/O port ranges 0-0xfff.

I think the runtime check should better test if simops was defined
first and fall back to normal PIO otherwise, in order to allow
LPC implementations on a PCI-LPC bridge.

How about allowing an I/O port range to be defined along with
the operations and check against that?

u8 intb(unsigned long port)
{
	if (arm64_simops &&
	    (port >= arm64_simops->min) && 
	    (port <= arm64_simops->max))
		return arm64_simops->pfin(arm64_simops, port, 1);
	else
		return readb(PCI_IOBASE + addr);
}

The other advantage of that is that you can dynamically register
a translation for the LPC port range into the Linux I/O port range
like PCI hosts do.

We may also want to move the inb/outb definitions into a .c file
as they are getting rather big.

	Arnd

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Thread

[PATCH V2 0/4] ARM64 LPC: legacy ISA I/O support Zhichang Yuan <yuanzhichang@hisilicon.com> - 2016-09-07 15:20 +0200
  [PATCH V2 4/4] ARM64 LPC: support earlycon for UART connected to LPC Zhichang Yuan <yuanzhichang@hisilicon.com> - 2016-09-07 15:20 +0200
    Re: [PATCH V2 4/4] ARM64 LPC: support earlycon for UART connected to LPC Arnd Bergmann <arnd@arndb.de> - 2016-09-07 17:00 +0200
      Re: [PATCH V2 4/4] ARM64 LPC: support earlycon for UART connected to  LPC zhichang <zhichang.yuan02@gmail.com> - 2016-09-08 12:10 +0200
        Re: [PATCH V2 4/4] ARM64 LPC: support earlycon for UART connected to LPC Arnd Bergmann <arnd@arndb.de> - 2016-09-08 13:10 +0200
  [PATCH V2 3/4] ARM64 LPC: support serial based on low-pin-count Zhichang Yuan <yuanzhichang@hisilicon.com> - 2016-09-07 15:20 +0200
    Re: [PATCH V2 3/4] ARM64 LPC: support serial based on low-pin-count Arnd Bergmann <arnd@arndb.de> - 2016-09-07 17:00 +0200
      Re: [PATCH V2 3/4] ARM64 LPC: support serial based on low-pin-count Arnd Bergmann <arnd@arndb.de> - 2016-09-08 12:00 +0200
      Re: [PATCH V2 3/4] ARM64 LPC: support serial based on low-pin-count zhichang <zhichang.yuan02@gmail.com> - 2016-09-08 12:00 +0200
  [PATCH V2 2/4] ARM64 LPC: LPC driver implementation on Hip06 Zhichang Yuan <yuanzhichang@hisilicon.com> - 2016-09-07 15:20 +0200
    Re: [PATCH V2 2/4] ARM64 LPC: LPC driver implementation on Hip06 Arnd Bergmann <arnd@arndb.de> - 2016-09-07 17:30 +0200
      Re: [PATCH V2 2/4] ARM64 LPC: LPC driver implementation on Hip06 "zhichang.yuan" <yuanzhichang@hisilicon.com> - 2016-09-08 10:10 +0200
        Re: [PATCH V2 2/4] ARM64 LPC: LPC driver implementation on Hip06 Arnd Bergmann <arnd@arndb.de> - 2016-09-08 12:10 +0200
  [PATCH V2 1/4] ARM64 LPC: Indirect ISA port IO introduced Zhichang Yuan <yuanzhichang@hisilicon.com> - 2016-09-07 15:20 +0200
    Re: [PATCH V2 1/4] ARM64 LPC: Indirect ISA port IO introduced Arnd Bergmann <arnd@arndb.de> - 2016-09-07 17:10 +0200
      Re: [PATCH V2 1/4] ARM64 LPC: Indirect ISA port IO introduced "zhichang.yuan" <yuanzhichang@hisilicon.com> - 2016-09-08 09:50 +0200
        Re: [PATCH V2 1/4] ARM64 LPC: Indirect ISA port IO introduced Arnd Bergmann <arnd@arndb.de> - 2016-09-08 15:30 +0200
    Re: [PATCH V2 1/4] ARM64 LPC: Indirect ISA port IO introduced kbuild test robot <lkp@intel.com> - 2016-09-07 17:30 +0200

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