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Groups > linux.kernel > #1470282
| From | Bin Gao <bin.gao@linux.intel.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH v2] x86/tsc: Set X86_FEATURE_TSC_RELIABLE to skip refined calibration |
| Date | 2016-08-25 18:50 +0200 |
| Message-ID | <sa60O-3vb-23@gated-at.bofh.it> (permalink) |
| References | <s6QEV-64O-5@gated-at.bofh.it> <s9Ccp-8hd-13@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Wed, Aug 24, 2016 at 10:51:20AM +0200, Thomas Gleixner wrote: > On Tue, 16 Aug 2016, Bin Gao wrote: > > On some newer Intel x86 processors/SoCs the TSC frequency can be directly > > calculated by factors read from specific MSR registers or from a cpuid > > leaf (0x15). TSC frequency calculated by native msr/cpuid is absolutely > > accurate so we should always skip calibrating TSC aginst another clock, > > e.g. PIT, HPET, etc. So we want to skip the refined calibration by setting > > the X86_FEATURE_TSC_RELIABLE flag. Existing code setting the flag by > > set_cpu_cap() doesn't work as the flag is cleared later in identify_cpu(). > > A cpu caps flag is not cleared only if it's set by setup_force_cpu_cap(). > > This patch converted set_cpu_cap() to setup_force_cpu_cap() to ensure > > refined calibration is skipped. > > > > We had a test on Intel CherryTrail platform: the 24 hours time drift is > > 3.6 seconds if refined calibration was not skipped while the drift is less > > than 0.6 second when refined calibration was skipped. > > > > Correctly setting the X86_FEATURE_TSC_RELIABLE flag also guarantees TSC is > > not monitored by timekeeping watchdog because on most of these system TSC > > is the only reliable clocksource. HPET, for instance, works but may not > > be reliable. So kernel may report a physically reliable TSC is not reliable > > just because a physically not reliable HPET is acting as timekeeping > > watchdog. > > What about non SoC systems where the MSR is available, but we still see that > cross socket TSC wreckage? This change will prevent the watchdog from > detecting that. MSR is only available on Intel Atom SoCs. There is no such a multi-socket system. > > Thanks, > > tglx
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[PATCH v2] x86/tsc: Set X86_FEATURE_TSC_RELIABLE to skip refined calibration Bin Gao <bin.gao@linux.intel.com> - 2016-08-16 19:50 +0200
Re: [PATCH v2] x86/tsc: Set X86_FEATURE_TSC_RELIABLE to skip refined calibration Thomas Gleixner <tglx@linutronix.de> - 2016-08-24 11:00 +0200
Re: [PATCH v2] x86/tsc: Set X86_FEATURE_TSC_RELIABLE to skip refined calibration Bin Gao <bin.gao@linux.intel.com> - 2016-08-25 18:50 +0200
Re: [PATCH v2] x86/tsc: Set X86_FEATURE_TSC_RELIABLE to skip refined calibration Thomas Gleixner <tglx@linutronix.de> - 2016-08-26 12:20 +0200
Re: [PATCH v2] x86/tsc: Set X86_FEATURE_TSC_RELIABLE to skip refined calibration Thomas Gleixner <tglx@linutronix.de> - 2016-08-26 13:10 +0200
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