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Groups > linux.kernel > #1558865
| From | Ingo Molnar <mingo@kernel.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 4/8] x86/platform/UV: Add Support for UV4 Hubless NMIs |
| Date | 2017-01-14 09:00 +0100 |
| Message-ID | <sZrpL-3gr-7@gated-at.bofh.it> (permalink) |
| References | <sZbXI-2vV-23@gated-at.bofh.it> <sZc7t-2zn-21@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
* Mike Travis <travis@sgi.com> wrote:
> --- linux.orig/arch/x86/kernel/apic/x2apic_uv_x.c
> +++ linux/arch/x86/kernel/apic/x2apic_uv_x.c
> @@ -1529,6 +1529,8 @@ void __init uv_system_init(void)
> uv_system_init_hub();
>
> /* Initialize UV hubless system here */
> + else
> + uv_nmi_setup_hubless();
That's not the proper coding style ...
> +++ linux/arch/x86/platform/uv/uv_nmi.c
> @@ -67,6 +67,19 @@ static struct uv_hub_nmi_s **uv_hub_nmi_
> DEFINE_PER_CPU(struct uv_cpu_nmi_s, uv_cpu_nmi);
> EXPORT_PER_CPU_SYMBOL_GPL(uv_cpu_nmi);
>
> +/* UV hubless values */
> +static int *pch_base;
> +#define NMI_CONTROL_PORT 0x70
Ditto...
> +#define NMI_DUMMY_PORT 0x71
> +#define GPI_NMI_STS_GPP_D_0 0x164
> +#define GPI_NMI_ENA_GPP_D_0 0x174
> +#define STS_GPP_D_0_MASK 0x1
> +#define PAD_CFG_DW0_GPP_D_0 0x4c0
> +#define GPIROUTNMI (1ul << 17)
> +#define PCH_PCR_GPIO_1_BASE 0xfdae0000ul
> +#define PCH_PCR_GPIO_ADDRESS(offset) \
> + (int *)((unsigned long long)pch_base | offset)
> +static void uv_init_hubless_pch_io(int offset, int mask, int data)
> +{
> + int *addr = PCH_PCR_GPIO_ADDRESS(offset);
> + int readd = readl(addr);
> +
> + if (mask) { /* OR in new data */
> + int writed = (readd & ~mask) | data;
> +
> + nmi_debug("UV:PCH: %p = %x & %x | %x (%x)\n",
> + addr, readd, ~mask, data, writed);
No unnecessary linebreaks please.
> +
> /* wait a moment for the hub nmi locker to set flag */
> - cpu_relax();
Please capitalize 'NMI' consistently in all the patches.
> + /* PCH NMI causes only one cpu to respond */
Same for 'CPU'.
> else if (uv_nmi_action_is("kdb") || uv_nmi_action_is("kgdb"))
> uv_call_kgdb_kdb(cpu, regs, master);
>
> + /* Unknown NMI action */
> + else {
Sigh ...
> +/* setup for UV Hubless systems */
> +void __init uv_nmi_setup_hubless(void)
> +{
> + uv_nmi_setup_common(false);
> +
> + pch_base = xlate_dev_mem_ptr(PCH_PCR_GPIO_1_BASE);
> + nmi_debug("UV: PCH base:%p from 0x%lx, GPP_D_0\n",
> + pch_base, PCH_PCR_GPIO_1_BASE);
> +
> + uv_init_hubless_pch_io(GPI_NMI_ENA_GPP_D_0,
> + STS_GPP_D_0_MASK, STS_GPP_D_0_MASK);
> +
> + uv_nmi_setup_hubless_intr();
> +
> + uv_reassert_nmi(); /* insure NMI enabled in proc inf reg */
And typos ...
Much cleaner patches please! I haven't checked the others in the series but please
review them for similar mishaps.
Thanks,
Ingo
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[PATCH 4/8] x86/platform/UV: Add Support for UV4 Hubless NMIs Mike Travis <travis@sgi.com> - 2017-01-13 16:40 +0100
Re: [PATCH 4/8] x86/platform/UV: Add Support for UV4 Hubless NMIs Ingo Molnar <mingo@kernel.org> - 2017-01-14 09:00 +0100
Re: [PATCH] x86/platform/UV: Clean up the UV APIC code Joe Perches <joe@perches.com> - 2017-01-14 14:20 +0100
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