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Groups > linux.kernel > #1559114
| From | Stafford Horne <shorne@gmail.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH 20/22] openrisc: entry: Whitespace and comment cleanups |
| Date | 2017-01-15 00:20 +0100 |
| Message-ID | <sZFM7-3B6-43@gated-at.bofh.it> (permalink) |
| References | <sZFCq-3xP-15@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Cleanups to whitespace and add some comments. Reading through the delay slot logic I noticed some things: - Delay slot instructions were not indented - Some comments are not lined up - Use tabs and spaces consistent with other code No functional change Signed-off-by: Stafford Horne <shorne@gmail.com> --- arch/openrisc/kernel/entry.S | 38 ++++++++++++++++++-------------------- 1 file changed, 18 insertions(+), 20 deletions(-) diff --git a/arch/openrisc/kernel/entry.S b/arch/openrisc/kernel/entry.S index ba1a361..daae2a4 100644 --- a/arch/openrisc/kernel/entry.S +++ b/arch/openrisc/kernel/entry.S @@ -228,7 +228,7 @@ EXCEPTION_ENTRY(_data_page_fault_handler) * DTLB miss handler in the CONFIG_GUARD_PROTECTED_CORE part */ #ifdef CONFIG_OPENRISC_NO_SPR_SR_DSX - l.lwz r6,PT_PC(r3) // address of an offending insn + l.lwz r6,PT_PC(r3) // address of an offending insn l.lwz r6,0(r6) // instruction that caused pf l.srli r6,r6,26 // check opcode for jump insn @@ -244,49 +244,47 @@ EXCEPTION_ENTRY(_data_page_fault_handler) l.bf 8f l.sfeqi r6,0x12 // l.jalr l.bf 8f - - l.nop + l.nop l.j 9f - l.nop -8: + l.nop - l.lwz r6,PT_PC(r3) // address of an offending insn +8: // offending insn is in delay slot + l.lwz r6,PT_PC(r3) // address of an offending insn l.addi r6,r6,4 l.lwz r6,0(r6) // instruction that caused pf l.srli r6,r6,26 // get opcode -9: +9: // offending instruction opcode loaded in r6 #else - l.mfspr r6,r0,SPR_SR // SR -// l.lwz r6,PT_SR(r3) // ESR - l.andi r6,r6,SPR_SR_DSX // check for delay slot exception - l.sfeqi r6,0x1 // exception happened in delay slot - l.bnf 7f - l.lwz r6,PT_PC(r3) // address of an offending insn + l.mfspr r6,r0,SPR_SR // SR + l.andi r6,r6,SPR_SR_DSX // check for delay slot exception + l.sfeqi r6,0x1 // exception happened in delay slot + l.bnf 7f + l.lwz r6,PT_PC(r3) // address of an offending insn - l.addi r6,r6,4 // offending insn is in delay slot + l.addi r6,r6,4 // offending insn is in delay slot 7: l.lwz r6,0(r6) // instruction that caused pf l.srli r6,r6,26 // check opcode for write access #endif - l.sfgeui r6,0x33 // check opcode for write access + l.sfgeui r6,0x33 // check opcode for write access l.bnf 1f l.sfleui r6,0x37 l.bnf 1f l.ori r6,r0,0x1 // write access l.j 2f - l.nop + l.nop 1: l.ori r6,r0,0x0 // !write access 2: /* call fault.c handler in or32/mm/fault.c */ l.jal do_page_fault - l.nop + l.nop l.j _ret_from_exception - l.nop + l.nop /* ---[ 0x400: Insn Page Fault exception ]------------------------------- */ EXCEPTION_ENTRY(_itlb_miss_page_fault_handler) @@ -306,9 +304,9 @@ EXCEPTION_ENTRY(_insn_page_fault_handler) /* call fault.c handler in or32/mm/fault.c */ l.jal do_page_fault - l.nop + l.nop l.j _ret_from_exception - l.nop + l.nop /* ---[ 0x500: Timer exception ]----------------------------------------- */ -- 2.9.3
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[PATCH 00/22] Openrisc patchees from backlog for 4.11 Stafford Horne <shorne@gmail.com> - 2017-01-15 00:10 +0100
[PATCH 19/22] scripts/checkstack.pl: Add openrisc support Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
[PATCH 16/22] openrisc: Add optimized memcpy routine Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
[PATCH 12/22] openrisc: remove unnecessary stddef.h include Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
[PATCH 21/22] openrisc: entry: Fix delay slot detection Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
[PATCH 14/22] openrisc: Initial support for the idle state Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
[PATCH 15/22] openrisc: Add optimized memset Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
[PATCH 10/22] openrisc: add spinlock implementation Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
[PATCH 11/22] openrisc: add futex_atomic_* implementations Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
[PATCH 03/22] openrisc: tlb miss handler optimizations Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
[PATCH 17/22] openrisc: Add .gitignore Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
[PATCH 13/22] openrisc: Fix the bitmask for the unit present register Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
[PATCH 22/22] openrisc: head: Move init strings to rodata section Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
[PATCH 07/22] openrisc: add atomic bitops Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
Re: [PATCH 07/22] openrisc: add atomic bitops kbuild test robot <lkp@intel.com> - 2017-01-15 06:40 +0100
Re: [PATCH 07/22] openrisc: add atomic bitops Stafford Horne <shorne@gmail.com> - 2017-01-15 09:30 +0100
[PATCH 09/22] openrisc: add optimized atomic operations Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
[PATCH 18/22] MAINTAINERS: Add the openrisc official repository Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
[PATCH 20/22] openrisc: entry: Whitespace and comment cleanups Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
Re: [PATCH 00/22] Openrisc patchees from backlog for 4.11 Guenter Roeck <linux@roeck-us.net> - 2017-01-15 06:20 +0100
Re: [PATCH 00/22] Openrisc patchees from backlog for 4.11 Stafford Horne <shorne@gmail.com> - 2017-01-15 09:40 +0100
Re: [PATCH 00/22] Openrisc patchees from backlog for 4.11 Stafford Horne <shorne@gmail.com> - 2017-01-16 13:00 +0100
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