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Groups > linux.kernel > #1559109
| From | Stafford Horne <shorne@gmail.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH 13/22] openrisc: Fix the bitmask for the unit present register |
| Date | 2017-01-15 00:20 +0100 |
| Message-ID | <sZFM6-3B6-33@gated-at.bofh.it> (permalink) |
| References | <sZFCq-3xP-15@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
From: Sebastian Macke <sebastian@macke.de> The bits were swapped, as per spec and processor implementation the power management present bit is 9 and PIC bit is 8. This patch brings the definitions into spec. Signed-off-by: Sebastian Macke <sebastian@macke.de> [shorne@gmail.com: Added commit body] Signed-off-by: Stafford Horne <shorne@gmail.com> --- arch/openrisc/include/asm/spr_defs.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/openrisc/include/asm/spr_defs.h b/arch/openrisc/include/asm/spr_defs.h index 5dbc668..367dac7 100644 --- a/arch/openrisc/include/asm/spr_defs.h +++ b/arch/openrisc/include/asm/spr_defs.h @@ -152,8 +152,8 @@ #define SPR_UPR_MP 0x00000020 /* MAC present */ #define SPR_UPR_DUP 0x00000040 /* Debug unit present */ #define SPR_UPR_PCUP 0x00000080 /* Performance counters unit present */ -#define SPR_UPR_PMP 0x00000100 /* Power management present */ -#define SPR_UPR_PICP 0x00000200 /* PIC present */ +#define SPR_UPR_PICP 0x00000100 /* PIC present */ +#define SPR_UPR_PMP 0x00000200 /* Power management present */ #define SPR_UPR_TTP 0x00000400 /* Tick timer present */ #define SPR_UPR_RES 0x00fe0000 /* Reserved */ #define SPR_UPR_CUP 0xff000000 /* Context units present */ -- 2.9.3
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[PATCH 00/22] Openrisc patchees from backlog for 4.11 Stafford Horne <shorne@gmail.com> - 2017-01-15 00:10 +0100
[PATCH 19/22] scripts/checkstack.pl: Add openrisc support Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
[PATCH 16/22] openrisc: Add optimized memcpy routine Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
[PATCH 12/22] openrisc: remove unnecessary stddef.h include Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
[PATCH 21/22] openrisc: entry: Fix delay slot detection Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
[PATCH 14/22] openrisc: Initial support for the idle state Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
[PATCH 15/22] openrisc: Add optimized memset Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
[PATCH 10/22] openrisc: add spinlock implementation Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
[PATCH 11/22] openrisc: add futex_atomic_* implementations Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
[PATCH 03/22] openrisc: tlb miss handler optimizations Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
[PATCH 17/22] openrisc: Add .gitignore Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
[PATCH 13/22] openrisc: Fix the bitmask for the unit present register Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
[PATCH 22/22] openrisc: head: Move init strings to rodata section Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
[PATCH 07/22] openrisc: add atomic bitops Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
Re: [PATCH 07/22] openrisc: add atomic bitops kbuild test robot <lkp@intel.com> - 2017-01-15 06:40 +0100
Re: [PATCH 07/22] openrisc: add atomic bitops Stafford Horne <shorne@gmail.com> - 2017-01-15 09:30 +0100
[PATCH 09/22] openrisc: add optimized atomic operations Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
[PATCH 18/22] MAINTAINERS: Add the openrisc official repository Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
[PATCH 20/22] openrisc: entry: Whitespace and comment cleanups Stafford Horne <shorne@gmail.com> - 2017-01-15 00:20 +0100
Re: [PATCH 00/22] Openrisc patchees from backlog for 4.11 Guenter Roeck <linux@roeck-us.net> - 2017-01-15 06:20 +0100
Re: [PATCH 00/22] Openrisc patchees from backlog for 4.11 Stafford Horne <shorne@gmail.com> - 2017-01-15 09:40 +0100
Re: [PATCH 00/22] Openrisc patchees from backlog for 4.11 Stafford Horne <shorne@gmail.com> - 2017-01-16 13:00 +0100
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