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Re: [PATCH 2/2] clk: hisilicon: add CRG driver for Hi3516CV300 SoC

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Hi Stephen,

On 2016/11/12 8:04, Stephen Boyd wrote:
> On 10/29, Jiancheng Xue wrote:
> 
> Should be a From: Pan Wen here?
> 
>> Add CRG driver for Hi3516CV300 SoC. CRG(Clock and Reset
>> Generator) module generates clock and reset signals used
>> by other module blocks on SoC.
>>
>> Signed-off-by: Pan Wen <wenpan@hisilicon.com>
> 
> And you should have signed it off? Care to resend or state that
> this is incorrectly attributed to you instead of Pan Wen?
> 

Pan Wen is the main author of this patch. I just made some small modification
with agreement from him. Do I need to resend this patch if it's better to add my
signed-off?

Thanks,
Jiancheng

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Re: [PATCH 2/2] clk: hisilicon: add CRG driver for Hi3516CV300 SoC Stephen Boyd <sboyd@codeaurora.org> - 2016-11-12 01:10 +0100
  Re: [PATCH 2/2] clk: hisilicon: add CRG driver for Hi3516CV300 SoC Jiancheng Xue <xuejiancheng@hisilicon.com> - 2016-11-14 02:30 +0100
    Re: [PATCH 2/2] clk: hisilicon: add CRG driver for Hi3516CV300 SoC Stephen Boyd <sboyd@codeaurora.org> - 2016-11-14 21:10 +0100
      Re: [PATCH 2/2] clk: hisilicon: add CRG driver for Hi3516CV300 SoC Jiancheng Xue <xuejiancheng@hisilicon.com> - 2016-11-15 03:00 +0100

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