[PATCH 2/4] irqchip/gic: Allow self-SGIs for SMP on UP configurations

From	Marc Zyngier <marc.zyngier@arm.com>
Newsgroups	linux.kernel
Subject	[PATCH 2/4] irqchip/gic: Allow self-SGIs for SMP on UP configurations
Date	2016-08-22 10:30 +0200
Message-ID	<s8SMh-3Ra-7@gated-at.bofh.it> (permalink)
References	<s8SMh-3Ra-9@gated-at.bofh.it>
Organization	linux.* mail to news gateway

Show all headers | View raw

On systems where a single CPU is present, the GIC may not support
having SGIs delivered to a target list. In that case, we use the
self-SGI mechanism to allow the interrupt to be delivered locally.

Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
 drivers/irqchip/irq-gic.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index c2cab57..390fac5 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -769,6 +769,13 @@ static void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
 	int cpu;
 	unsigned long flags, map = 0;
 
+	if (unlikely(nr_cpu_ids == 1)) {
+		/* Only one CPU? let's do a self-IPI... */
+		writel_relaxed(2 << 24 | irq,
+			       gic_data_dist_base(&gic_data[0]) + GIC_DIST_SOFTINT);
+		return;
+	}
+
 	raw_spin_lock_irqsave(&irq_controller_lock, flags);
 
 	/* Convert our logical CPU mask into a physical one. */
-- 
2.1.4

Back to linux.kernel | Previous | Next | Find similar | Unroll thread

Thread

[PATCH 2/4] irqchip/gic: Allow self-SGIs for SMP on UP configurations Marc Zyngier <marc.zyngier@arm.com> - 2016-08-22 10:30 +0200

csiph-web