Re: spin_lock implicit/explicit memory barrier

From	Peter Zijlstra <peterz@infradead.org>
Newsgroups	linux.kernel
Subject	Re: spin_lock implicit/explicit memory barrier
Date	2016-08-19 16:10 +0200
Message-ID	<s7SEG-6Cv-13@gated-at.bofh.it> (permalink)
References	(5 earlier) <s4KDE-2TN-27@gated-at.bofh.it> <s4Lgl-3pe-1@gated-at.bofh.it> <s4Tnz-1hD-3@gated-at.bofh.it> <s533A-7sT-15@gated-at.bofh.it> <s5b17-4yK-5@gated-at.bofh.it>
Organization	linux.* mail to news gateway

Show all headers | View raw

On Fri, Aug 12, 2016 at 10:59:46AM +0800, Boqun Feng wrote:
> But if an arch implements its spin_lock() with a full barrier, even
> though the atomic is implemented by ll/sc, the STORE part of which can't
> be reordered with memory operations in the critcal sections. I think
> maybe that's the case for alpha(and also for ARM32).

Correct, Alpha only has a full fence and uses that after the ll/sc to
provide acquire semantics, ARM has other barriers but too uses a full
barrier here.

Thread

Re: spin_lock implicit/explicit memory barrier Davidlohr Bueso <dave@stgolabs.net> - 2016-08-11 00:30 +0200
  Re: spin_lock implicit/explicit memory barrier "Paul E. McKenney" <paulmck@linux.vnet.ibm.com> - 2016-08-11 01:00 +0200
    Re: spin_lock implicit/explicit memory barrier Davidlohr Bueso <dave@stgolabs.net> - 2016-08-11 01:40 +0200
      Re: spin_lock implicit/explicit memory barrier Peter Zijlstra <peterz@infradead.org> - 2016-08-11 10:20 +0200
        Re: spin_lock implicit/explicit memory barrier Davidlohr Bueso <dave@stgolabs.net> - 2016-08-11 20:40 +0200
          Re: spin_lock implicit/explicit memory barrier Boqun Feng <boqun.feng@gmail.com> - 2016-08-12 05:10 +0200
            Re: spin_lock implicit/explicit memory barrier Peter Zijlstra <peterz@infradead.org> - 2016-08-19 16:10 +0200
  Re: spin_lock implicit/explicit memory barrier Benjamin Herrenschmidt <benh@kernel.crashing.org> - 2016-08-11 02:10 +0200

csiph-web