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Re: [PART1 RFC v3 10/12] svm: Do not expose x2APIC when enable AVIC

From Paolo Bonzini <pbonzini@redhat.com>
Newsgroups linux.kernel
Subject Re: [PART1 RFC v3 10/12] svm: Do not expose x2APIC when enable AVIC
Date 2016-03-31 13:30 +0200
Message-ID <riIXx-4as-41@gated-at.bofh.it> (permalink)
References <rdVVn-1Lv-3@gated-at.bofh.it> <rdVVo-1Lv-17@gated-at.bofh.it> <re9OH-ey-23@gated-at.bofh.it> <riIXx-4as-43@gated-at.bofh.it>
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On 31/03/2016 06:15, Suravee Suthikulpanit wrote:
>>> +                vcpu->arch.cpuid_entries[i].ecx &= ~(1 << 21);
>> 
>> and X86_FEATURE_X2APIC (or something with X2APIC in name) for the
>> bit.
>> 
>> The code will become so obvious that the comment can be removed.
>> :)
> 
> Good point. I can only find example of using (X86_FEATURE_X2APIC %
> 32) == 21.

You can use bit(X86_FEATURE_X2APIC), it is defined in arch/x86/kvm/x86.h.

>> but the MSR interface is going to exit and host-side interrupt 
>> delivery will probably still work, so I don't see a huge problem
>> with it.
> 
> Agree that it will still work. However, in such case, the guest code
> would likely default to using x2APIC interface, which will not be
> handled by the AVIC hardware, and resulting in no performance
> improvement that we are trying to introduce.

You would still get some improvement from exit-free interrupt delivery.

Paolo

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Thread

[PART1 RFC v3 00/12] KVM: x86: Introduce SVM AVIC support Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> - 2016-03-18 07:20 +0100
  [PART1 RFC v3 11/12] svm: Do not intercept CR8 when enable AVIC Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> - 2016-03-18 07:20 +0100
    Re: [PART1 RFC v3 11/12] svm: Do not intercept CR8 when enable AVIC Radim Krčmář <rkrcmar@redhat.com> - 2016-03-18 22:20 +0100
  [PART1 RFC v3 03/12] KVM: x86: Introducing kvm_x86_ops VCPU blocking/unblocking hooks Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> - 2016-03-18 07:20 +0100
    Re: [PART1 RFC v3 03/12] KVM: x86: Introducing kvm_x86_ops VCPU  blocking/unblocking hooks Paolo Bonzini <pbonzini@redhat.com> - 2016-03-18 11:20 +0100
  [PART1 RFC v3 05/12] svm: Introduce new AVIC VMCB registers Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> - 2016-03-18 07:20 +0100
  [PART1 RFC v3 01/12] KVM: x86: Misc LAPIC changes to expose helper functions Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> - 2016-03-18 07:20 +0100
    Re: [PART1 RFC v3 01/12] KVM: x86: Misc LAPIC changes to expose  helper functions Paolo Bonzini <pbonzini@redhat.com> - 2016-03-18 12:20 +0100
  [PART1 RFC v3 12/12] svm: Manage vcpu load/unload when enable AVIC Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> - 2016-03-18 07:20 +0100
    Re: [PART1 RFC v3 12/12] svm: Manage vcpu load/unload when enable  AVIC Radim Krčmář <rkrcmar@redhat.com> - 2016-03-18 22:50 +0100
      Re: [PART1 RFC v3 12/12] svm: Manage vcpu load/unload when enable  AVIC Radim Krčmář <rkrcmar@redhat.com> - 2016-03-31 16:20 +0200
  [PART1 RFC v3 06/12] KVM: x86: Detect and Initialize AVIC support Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> - 2016-03-18 07:20 +0100
    Re: [PART1 RFC v3 06/12] KVM: x86: Detect and Initialize AVIC support Paolo Bonzini <pbonzini@redhat.com> - 2016-03-18 12:30 +0100
  [PART1 RFC v3 10/12] svm: Do not expose x2APIC when enable AVIC Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> - 2016-03-18 07:20 +0100
    Re: [PART1 RFC v3 10/12] svm: Do not expose x2APIC when enable AVIC Radim Krčmář <rkrcmar@redhat.com> - 2016-03-18 22:10 +0100
      Re: [PART1 RFC v3 10/12] svm: Do not expose x2APIC when enable AVIC Paolo Bonzini <pbonzini@redhat.com> - 2016-03-31 13:30 +0200

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