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Groups > linux.kernel > #1361965
| From | Andi Kleen <andi@firstfloor.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH 1/9] x86: Add intrinsics/macros for new rd/wr fs/gs base instructions |
| Date | 2016-03-21 17:20 +0100 |
| Message-ID | <rfaIF-8aj-9@gated-at.bofh.it> (permalink) |
| References | <rfaIF-8aj-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
From: Andi Kleen <ak@linux.intel.com>
Add C intrinsics and assembler macros for the new rd/wr fs/gs base
instructions and for swapgs.
Very straight forward. Used in followon patch.
For assembler only a few standard registers used by entry_64.S
are defined.
v2: Use __always_inline
Signed-off-by: Andi Kleen <ak@linux.intel.com>
---
arch/x86/include/asm/fsgs.h | 54 +++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 54 insertions(+)
create mode 100644 arch/x86/include/asm/fsgs.h
diff --git a/arch/x86/include/asm/fsgs.h b/arch/x86/include/asm/fsgs.h
new file mode 100644
index 0000000..8a9f900
--- /dev/null
+++ b/arch/x86/include/asm/fsgs.h
@@ -0,0 +1,54 @@
+#ifndef _ASM_FSGS_H
+#define _ASM_FSGS_H 1
+
+#ifndef __ASSEMBLY__
+
+static __always_inline void swapgs(void)
+{
+ asm volatile("swapgs" ::: "memory");
+}
+
+/* Must be protected by X86_FEATURE_FSGSBASE check. */
+
+static __always_inline unsigned long rdgsbase(void)
+{
+ unsigned long gs;
+ asm volatile(".byte 0xf3,0x48,0x0f,0xae,0xc8 # rdgsbaseq %%rax"
+ : "=a" (gs)
+ :: "memory");
+ return gs;
+}
+
+static __always_inline unsigned long rdfsbase(void)
+{
+ unsigned long fs;
+ asm volatile(".byte 0xf3,0x48,0x0f,0xae,0xc0 # rdfsbaseq %%rax"
+ : "=a" (fs)
+ :: "memory");
+ return fs;
+}
+
+static __always_inline void wrgsbase(unsigned long gs)
+{
+ asm volatile(".byte 0xf3,0x48,0x0f,0xae,0xd8 # wrgsbaseq %%rax"
+ :: "a" (gs)
+ : "memory");
+}
+
+static __always_inline void wrfsbase(unsigned long fs)
+{
+ asm volatile(".byte 0xf3,0x48,0x0f,0xae,0xd0 # wrfsbaseq %%rax"
+ :: "a" (fs)
+ : "memory");
+}
+
+#else
+
+/* Handle old assemblers. */
+#define RDGSBASE_R15 .byte 0xf3,0x49,0x0f,0xae,0xcf
+#define WRGSBASE_RDI .byte 0xf3,0x48,0x0f,0xae,0xdf
+#define WRGSBASE_R15 .byte 0xf3,0x49,0x0f,0xae,0xdf
+
+#endif /* __ASSEMBLY__ */
+
+#endif
--
2.5.5
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[PATCH 1/9] x86: Add intrinsics/macros for new rd/wr fs/gs base instructions Andi Kleen <andi@firstfloor.org> - 2016-03-21 17:20 +0100 Re: [PATCH 1/9] x86: Add intrinsics/macros for new rd/wr fs/gs base instructions Andy Lutomirski <luto@amacapital.net> - 2016-03-21 19:20 +0100
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