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Groups > linux.kernel > #1442969
| From | David Carrillo-Cisneros <davidcc@google.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 30/32] x86/intel_rdt_rdtgroup.c: Process schemas input from rscctrl interface |
| Date | 2016-07-14 02:50 +0200 |
| Message-ID | <rUD0J-2cF-7@gated-at.bofh.it> (permalink) |
| References | <rUe2l-2xx-3@gated-at.bofh.it> <rUe2p-2xx-111@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
> +static int get_res_type(char **res, enum resource_type *res_type)
> +{
> + char *tok;
> +
> + tok = strsep(res, ":");
> + if (tok == NULL)
> + return -EINVAL;
> +
> + if (!strcmp(tok, "L3")) {
Maybe use strstrip to allow a more readable input ? i.e. "L3 : <schema> "
> + *res_type = RESOURCE_L3;
> + return 0;
> + }
> +
> + return -EINVAL;
> +}
> +
> +static int divide_resources(char *buf, char *resources[RESOURCE_NUM])
> +{
> + char *tok;
> + unsigned int resource_num = 0;
> + int ret = 0;
> + char *res;
> + char *res_block;
> + size_t size;
> + enum resource_type res_type;
> +
> + size = strlen(buf) + 1;
> + res = kzalloc(size, GFP_KERNEL);
> + if (!res) {
> + ret = -ENOSPC;
-ENOMEM?
> +
> + res_block = res;
> + ret = get_res_type(&res_block, &res_type);
> + if (ret) {
> + pr_info("Unknown resource type!");
> + goto out;
> + }
does this work if res_block doesn't have ":"? don't you need to check res_block?
> +static int get_cache_schema(char *buf, struct cache_resource *l, int level,
> + struct rdtgroup *rdtgrp)
> +{
> + char *tok, *tok_cache_id;
> + int ret;
> + int domain_num;
> + int input_domain_num;
> + int len;
> + unsigned int input_cache_id;
> + unsigned int cid;
> + unsigned int leaf;
> +
> + if (!cat_enabled(level) && strcmp(buf, ";")) {
> + pr_info("Disabled resource should have empty schema\n");
> + return -EINVAL;
> + }
> +
> + len = strlen(buf);
> + /*
> + * Translate cache id based cbm from one line string with format
> + * "<cache prefix>:<cache id0>=xxxx;<cache id1>=xxxx;..." for
> + * disabled cdp.
> + * Or
> + * "<cache prefix>:<cache id0>=xxxxx,xxxxx;<cache id1>=xxxxx,xxxxx;..."
> + * for enabled cdp.
> + */
> + input_domain_num = 0;
> + while ((tok = strsep(&buf, ";")) != NULL) {
> + tok_cache_id = strsep(&tok, "=");
> + if (tok_cache_id == NULL)
> + goto cache_id_err;
what if no "=" ? , also would be nice to allow spaces around "=" .
> +
> + ret = kstrtouint(tok_cache_id, 16, &input_cache_id);
> + if (ret)
> + goto cache_id_err;
> +
> + leaf = level_to_leaf(level);
why is this in the loop?
> + cid = cache_domains[leaf].shared_cache_id[input_domain_num];
> + if (input_cache_id != cid)
> + goto cache_id_err;
so schemata must be present for all cache_id's and sorted in
increasing order of cache_id? what's the point of having the cache_id#
then?
> +
> +/*
> + * Check if the reference counts are all ones in rdtgrp's domain.
> + */
> +static bool one_refcnt(struct rdtgroup *rdtgrp, int domain)
> +{
> + int refcnt;
> + int closid;
> +
> + closid = rdtgrp->resource.closid[domain];
> + if (cat_l3_enabled) {
if cat_l3_enabled == false, then reference counts are always one?
> + * Go through all shared domains. Check if there is an existing closid
> + * in all rdtgroups that matches l3 cbms in the shared
> + * domain. If find one, reuse the closid. Otherwise, allocate a new one.
> + */
> +static int get_rdtgroup_resources(struct resources *resources_set,
> + struct rdtgroup *rdtgrp)
> +{
> + struct cache_resource *l3;
> + bool l3_cbm_found;
> + struct list_head *l;
> + struct rdtgroup *r;
> + u64 cbm;
> + int rdt_closid[MAX_CACHE_DOMAINS];
> + int rdt_closid_type[MAX_CACHE_DOMAINS];
> + int domain;
> + int closid;
> + int ret;
> +
> + l3 = resources_set->l3;
l3 is NULL if cat_l3_enabled == false but it seems like it may be used
later even though.
> + memcpy(rdt_closid, rdtgrp->resource.closid,
> + shared_domain_num * sizeof(int));
> + for (domain = 0; domain < shared_domain_num; domain++) {
> + if (rdtgrp->resource.valid) {
> + /*
> + * If current rdtgrp is the only user of cbms in
> + * this domain, will replace the cbms with the input
> + * cbms and reuse its own closid.
> + */
> + if (one_refcnt(rdtgrp, domain)) {
> + closid = rdtgrp->resource.closid[domain];
> + rdt_closid[domain] = closid;
> + rdt_closid_type[domain] = REUSED_OWN_CLOSID;
> + continue;
> + }
> +
> + l3_cbm_found = true;
> +
> + if (cat_l3_enabled)
> + l3_cbm_found = cbm_found(l3, rdtgrp, domain,
> + CACHE_LEVEL3);
> +
> + /*
> + * If the cbms in this shared domain are already
> + * existing in current rdtgrp, record the closid
> + * and its type.
> + */
> + if (l3_cbm_found) {
> + closid = rdtgrp->resource.closid[domain];
> + rdt_closid[domain] = closid;
> + rdt_closid_type[domain] = CURRENT_CLOSID;
a new l3 resource will be created if cat_l3_enabled is false.
> +static void init_cache_resource(struct cache_resource *l)
> +{
> + l->cbm = NULL;
> + l->cbm2 = NULL;
is cbm2 the data bitmask for when CDP is enabled? if so, a more
descriptive name may help.
> + l->closid = NULL;
> + l->refcnt = NULL;
> +}
> +
> +static void free_cache_resource(struct cache_resource *l)
> +{
> + kfree(l->cbm);
> + kfree(l->cbm2);
> + kfree(l->closid);
> + kfree(l->refcnt);
this function is used to clean up alloc_cache_resource in the error
path of get_resources where it's not necessarily true that all of l's
members were allocated.
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[PATCH 00/32] Enable Intel Resource Allocation in Resource Director Technology "Fenghua Yu" <fenghua.yu@intel.com> - 2016-07-13 00:10 +0200
[PATCH 06/32] x86/intel_rdt: Hot cpu support for Cache Allocation "Fenghua Yu" <fenghua.yu@intel.com> - 2016-07-13 00:10 +0200
Re: [PATCH 06/32] x86/intel_rdt: Hot cpu support for Cache Allocation Thomas Gleixner <tglx@linutronix.de> - 2016-07-13 11:30 +0200
Re: [PATCH 06/32] x86/intel_rdt: Hot cpu support for Cache Allocation Shivappa Vikas <vikas.shivappa@linux.intel.com> - 2016-07-21 21:50 +0200
Re: [PATCH 06/32] x86/intel_rdt: Hot cpu support for Cache Allocation David Carrillo-Cisneros <davidcc@google.com> - 2016-07-14 02:50 +0200
RE: [PATCH 06/32] x86/intel_rdt: Hot cpu support for Cache Allocation "Yu, Fenghua" <fenghua.yu@intel.com> - 2016-07-15 01:00 +0200
[PATCH 19/32] sched.h: Add rg_list and rdtgroup in task_struct "Fenghua Yu" <fenghua.yu@intel.com> - 2016-07-13 00:10 +0200
Re: [PATCH 19/32] sched.h: Add rg_list and rdtgroup in task_struct Thomas Gleixner <tglx@linutronix.de> - 2016-07-13 15:10 +0200
RE: [PATCH 19/32] sched.h: Add rg_list and rdtgroup in task_struct "Yu, Fenghua" <fenghua.yu@intel.com> - 2016-07-13 20:00 +0200
[PATCH 21/32] x86/intel_rdt.h: Header for inter_rdt.c "Fenghua Yu" <fenghua.yu@intel.com> - 2016-07-13 00:10 +0200
[PATCH 12/32] x86/intel_rdt: Hot cpu update for code data prioritization "Fenghua Yu" <fenghua.yu@intel.com> - 2016-07-13 00:10 +0200
[PATCH 27/32] x86/intel_rdt_rdtgroup.c: Implement rscctrl file system commands "Fenghua Yu" <fenghua.yu@intel.com> - 2016-07-13 00:10 +0200
[PATCH 30/32] x86/intel_rdt_rdtgroup.c: Process schemas input from rscctrl interface "Fenghua Yu" <fenghua.yu@intel.com> - 2016-07-13 00:10 +0200
Re: [PATCH 30/32] x86/intel_rdt_rdtgroup.c: Process schemas input from rscctrl interface David Carrillo-Cisneros <davidcc@google.com> - 2016-07-14 02:50 +0200
RE: [PATCH 30/32] x86/intel_rdt_rdtgroup.c: Process schemas input from rscctrl interface "Yu, Fenghua" <fenghua.yu@intel.com> - 2016-07-14 08:20 +0200
Re: [PATCH 30/32] x86/intel_rdt_rdtgroup.c: Process schemas input from rscctrl interface Thomas Gleixner <tglx@linutronix.de> - 2016-07-14 08:20 +0200
RE: [PATCH 30/32] x86/intel_rdt_rdtgroup.c: Process schemas input from rscctrl interface "Yu, Fenghua" <fenghua.yu@intel.com> - 2016-07-14 08:40 +0200
[PATCH 02/32] x86/intel_rdt: Add support for Cache Allocation detection "Fenghua Yu" <fenghua.yu@intel.com> - 2016-07-13 00:10 +0200
[PATCH 01/32] x86/intel_rdt: Cache Allocation documentation "Fenghua Yu" <fenghua.yu@intel.com> - 2016-07-13 00:10 +0200
[PATCH 28/32] x86/intel_rdt_rdtgroup.c: Read and write cpus "Fenghua Yu" <fenghua.yu@intel.com> - 2016-07-13 00:10 +0200
[PATCH 03/32] x86/intel_rdt: Add Class of service management "Fenghua Yu" <fenghua.yu@intel.com> - 2016-07-13 00:20 +0200
[PATCH 04/32] x86/intel_rdt: Add L3 cache capacity bitmask management "Fenghua Yu" <fenghua.yu@intel.com> - 2016-07-13 00:20 +0200
Re: [PATCH 04/32] x86/intel_rdt: Add L3 cache capacity bitmask management Marcelo Tosatti <mtosatti@redhat.com> - 2016-07-22 23:10 +0200
Re: [PATCH 04/32] x86/intel_rdt: Add L3 cache capacity bitmask management "Luck, Tony" <tony.luck@intel.com> - 2016-07-22 23:50 +0200
[PATCH 05/32] x86/intel_rdt: Implement scheduling support for Intel RDT "Fenghua Yu" <fenghua.yu@intel.com> - 2016-07-13 00:20 +0200
Re: [PATCH 05/32] x86/intel_rdt: Implement scheduling support for Intel RDT Nilay Vaish <nilayvaish@gmail.com> - 2016-07-25 18:30 +0200
Re: [PATCH 05/32] x86/intel_rdt: Implement scheduling support for Intel RDT Nilay Vaish <nilayvaish@gmail.com> - 2016-07-25 18:40 +0200
Re: [PATCH 05/32] x86/intel_rdt: Implement scheduling support for Intel RDT "Luck, Tony" <tony.luck@intel.com> - 2016-07-25 20:10 +0200
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