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Re: [RFC][PATCH 1/7] perf/x86/intel: Rework the large PEBS setup code

From Jiri Olsa <jolsa@redhat.com>
Newsgroups linux.kernel
Subject Re: [RFC][PATCH 1/7] perf/x86/intel: Rework the large PEBS setup code
Date 2016-07-10 11:10 +0200
Message-ID <rTiUp-733-7@gated-at.bofh.it> (permalink)
References <rSEDD-5P7-3@gated-at.bofh.it> <rSEDF-5P7-63@gated-at.bofh.it> <rSGYO-7fn-21@gated-at.bofh.it> <rSM89-2pR-9@gated-at.bofh.it> <rSMrv-2wN-1@gated-at.bofh.it>
Organization linux.* mail to news gateway

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On Sat, Jul 09, 2016 at 12:25:09AM +0200, Peter Zijlstra wrote:
> On Sat, Jul 09, 2016 at 12:00:47AM +0200, Peter Zijlstra wrote:
> > Yes, you're right. Let me try and see if I can make that better.
> 
> Something like so?

yep, seems good ;-)

jirka

> 
> ---
> --- a/arch/x86/events/intel/ds.c
> +++ b/arch/x86/events/intel/ds.c
> @@ -831,6 +831,18 @@ static inline void pebs_update_threshold
>  	ds->pebs_interrupt_threshold = threshold;
>  }
>  
> +static void pebs_update_state(bool needs_cb, struct cpu_hw_events *cpuc, struct pmu *pmu)
> +{
> +	if (needs_cb != pebs_needs_sched_cb(cpuc)) {
> +		if (!needs_cb)
> +			perf_sched_cb_inc(pmu);
> +		else
> +			perf_sched_cb_dec(pmu);
> +
> +		pebs_update_threshold(cpuc);
> +	}
> +}
> +
>  static void intel_pmu_pebs_add(struct perf_event *event)
>  {
>  	struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
> @@ -841,10 +853,7 @@ static void intel_pmu_pebs_add(struct pe
>  	if (hwc->flags & PERF_X86_EVENT_FREERUNNING)
>  		cpuc->n_large_pebs++;
>  
> -	if (!needs_cb && pebs_needs_sched_cb(cpuc))
> -		perf_sched_cb_inc(event->ctx->pmu);
> -
> -	pebs_update_threshold(cpuc);
> +	pebs_update_state(needs_cb, cpuc, event->ctx->pmu);
>  }
>  
>  void intel_pmu_pebs_enable(struct perf_event *event)
> @@ -884,11 +893,7 @@ static void intel_pmu_pebs_del(struct pe
>  	if (hwc->flags & PERF_X86_EVENT_FREERUNNING)
>  		cpuc->n_large_pebs--;
>  
> -	if (needs_cb && !pebs_needs_sched_cb(cpuc))
> -		perf_sched_cb_dec(event->ctx->pmu);
> -
> -	if (cpuc->n_pebs)
> -		pebs_update_threshold(cpuc);
> +	pebs_update_state(needs_cb, cpuc, event->ctx->pmu);
>  }
>  
>  void intel_pmu_pebs_disable(struct perf_event *event)

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Thread

[RFC][PATCH 0/7] perf: Branch stack annotation and fixes Peter Zijlstra <peterz@infradead.org> - 2016-07-08 16:10 +0200
  [RFC][PATCH 7/7] perf/annotate: Add branch stack / basic block information Peter Zijlstra <peterz@infradead.org> - 2016-07-08 16:10 +0200
    Re: [RFC][PATCH 7/7] perf/annotate: Add branch stack / basic block  information Ingo Molnar <mingo@kernel.org> - 2016-07-08 17:00 +0200
      Re: [RFC][PATCH 7/7] perf/annotate: Add branch stack / basic block  information Peter Zijlstra <peterz@infradead.org> - 2016-07-08 18:30 +0200
        Re: [RFC][PATCH 7/7] perf/annotate: Add branch stack / basic block  information Peter Zijlstra <peterz@infradead.org> - 2016-07-08 18:40 +0200
  [RFC][PATCH 1/7] perf/x86/intel: Rework the large PEBS setup code Peter Zijlstra <peterz@infradead.org> - 2016-07-08 16:10 +0200
    Re: [RFC][PATCH 1/7] perf/x86/intel: Rework the large PEBS setup code Jiri Olsa <jolsa@redhat.com> - 2016-07-08 18:40 +0200
      Re: [RFC][PATCH 1/7] perf/x86/intel: Rework the large PEBS setup code Peter Zijlstra <peterz@infradead.org> - 2016-07-09 00:10 +0200
        Re: [RFC][PATCH 1/7] perf/x86/intel: Rework the large PEBS setup code Peter Zijlstra <peterz@infradead.org> - 2016-07-09 00:30 +0200
          Re: [RFC][PATCH 1/7] perf/x86/intel: Rework the large PEBS setup code Jiri Olsa <jolsa@redhat.com> - 2016-07-10 11:10 +0200

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