Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1330029
| From | Antoine Tenart <antoine.tenart@free-electrons.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 2/3] arm64: dts: add the Alpine v2 EVP |
| Date | 2016-02-09 11:20 +0100 |
| Message-ID | <r0dyP-2DB-39@gated-at.bofh.it> (permalink) |
| References | <qZQ9c-3eh-9@gated-at.bofh.it> <qZQ9c-3eh-7@gated-at.bofh.it> <qZT73-584-5@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
[Multipart message — attachments visible in raw view] - view raw
Hello Arnd,
On Mon, Feb 08, 2016 at 01:20:40PM +0100, Arnd Bergmann wrote:
> On Monday 08 February 2016 10:11:38 Antoine Tenart wrote:
> > index 000000000000..3e3080fa45e4
> > --- /dev/null
> > +
> > +#include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > +/ {
> > + model = "Annapurna Labs Alpine v2";
> > + compatible = "al,alpine-v2";
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > +
> > + aliases {
> > + serial0 = &uart0;
> > + serial1 = &uart1;
> > + serial2 = &uart2;
> > + serial3 = &uart3;
> > + };
>
> Move the aliases to the .dts files and drop the ones that are disabled.
Sure.
> > +
> > + pcie-internal@0xfbc00000 {
>
> make this
>
> pci@fbc00000 {
Will do.
>
> > + compatible = "pci-host-ecam-generic";
> > + device_type = "pci";
> > + #size-cells = <2>;
> > + #address-cells = <3>;
> > + #interrupt-cells = <1>;
> > + reg = <0x0 0xfbc00000 0x0 0x100000>;
> > + interrupt-map-mask = <0xf800 0 0 7>;
> > + /* add legacy interrupts for SATA only */
> > + interrupt-map = <0x4000 0 0 1 &gic 0 53 4>,
> > + <0x4800 0 0 1 &gic 0 54 4>;
>
> What's wrong with the other IRQs? Not connected?
From what I know the other IRQs are disconnected.
> > +
> > + uart0: uart@fd883000 {
>
> serial@fd883000
>
>
> Almost all devices are in the 0xfd000000 range. Could this be a bus in the
> SoC that has all the devices attached to it? Maybe use a "ranges" property
> to reflect that. In doubt, use the register numbers from the data sheet if you
> have one.
I'll try using a range property in the v2 of the series.
Thanks for the review!
Antoine
--
Antoine Ténart, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
Back to linux.kernel | Previous | Next — Previous in thread | Next in thread | Find similar | Unroll thread
[PATCH 2/3] arm64: dts: add the Alpine v2 EVP Antoine Tenart <antoine.tenart@free-electrons.com> - 2016-02-08 10:20 +0100
Re: [PATCH 2/3] arm64: dts: add the Alpine v2 EVP Mark Rutland <mark.rutland@arm.com> - 2016-02-08 12:00 +0100
Re: [PATCH 2/3] arm64: dts: add the Alpine v2 EVP Antoine Tenart <antoine.tenart@free-electrons.com> - 2016-02-08 12:10 +0100
Re: [PATCH 2/3] arm64: dts: add the Alpine v2 EVP Arnd Bergmann <arnd@arndb.de> - 2016-02-08 13:30 +0100
Re: [PATCH 2/3] arm64: dts: add the Alpine v2 EVP Antoine Tenart <antoine.tenart@free-electrons.com> - 2016-02-09 11:20 +0100
Re: [PATCH 2/3] arm64: dts: add the Alpine v2 EVP Marc Zyngier <marc.zyngier@arm.com> - 2016-02-08 16:40 +0100
Re: [PATCH 2/3] arm64: dts: add the Alpine v2 EVP Antoine Tenart <antoine.tenart@free-electrons.com> - 2016-02-09 10:00 +0100
Re: [PATCH 2/3] arm64: dts: add the Alpine v2 EVP Antoine Tenart <antoine.tenart@free-electrons.com> - 2016-02-09 10:10 +0100
Re: [PATCH 2/3] arm64: dts: add the Alpine v2 EVP Marc Zyngier <marc.zyngier@arm.com> - 2016-02-09 10:20 +0100
Re: [PATCH 2/3] arm64: dts: add the Alpine v2 EVP Marc Zyngier <marc.zyngier@arm.com> - 2016-02-09 10:40 +0100
Re: [PATCH 2/3] arm64: dts: add the Alpine v2 EVP Tsahee Zidenberg <tsahee@annapurnalabs.com> - 2016-02-09 11:20 +0100
Re: [PATCH 2/3] arm64: dts: add the Alpine v2 EVP Marc Zyngier <marc.zyngier@arm.com> - 2016-02-09 11:50 +0100
Re: [PATCH 2/3] arm64: dts: add the Alpine v2 EVP Marc Zyngier <marc.zyngier@arm.com> - 2016-02-09 12:50 +0100
Re: [PATCH 2/3] arm64: dts: add the Alpine v2 EVP Tsahee Zidenberg <tsahee@annapurnalabs.com> - 2016-02-09 15:00 +0100
csiph-web