Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]

Groups > linux.kernel > #1254083

Re: [PATCH v11 4/6] PCI: hisi: Add PCIe host support for HiSilicon SoC Hip05

Show all headers | View raw

Hi Zhou,

This looks pretty good to me; just a mask question and add a printk.

On Fri, Oct 16, 2015 at 06:23:39PM +0800, Zhou Wang wrote:
> This patch adds PCIe host support for HiSilicon SoC Hip05.
> ...

> +#define PCIE_SUBCTRL_SYS_STATE4_REG                     0x6818
> +#define PCIE_LTSSM_LINKUP_STATE                         0x11
> +#define PCIE_LTSSM_STATE_MASK                           0x3F

Fabio unified some of this; see
  https://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/commit/?h=pci/host-designware&id=4788fe6ebf4594c9a95b620cbff05147c8504823
  https://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/commit/?h=pci/host-designware&id=b09464f77dd252a782da1f4e9925c1dbce4540ac

So the question is, why do you use a 6-bit (0x3f) LTSSM_STATE_MASK?
We think we can use a 5-bit mask (0x1f) for all the other
DesignWare-based systems.

> +/* Hip05 PCIe host only supports 32-bit config access */

Thanks for the comment asserting that Hip05 only supports 32-bit
config access.  I assume you confirmed that with the hardware
designers.  As far as I can tell, this *is* a hardware defect, and at
the minimum, I want a printk at driver probe-time so a dmesg log will
have a clue that read/modify/write on config space might do the wrong
thing.

> +static int hisi_pcie_cfg_read(struct pcie_port *pp, int where, int size,
> +			      u32 *val)
> ...

Bjorn
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Back to linux.kernel | Previous | Next — Next in thread | Find similar | Unroll thread

Thread

Re: [PATCH v11 4/6] PCI: hisi: Add PCIe host support for HiSilicon  SoC Hip05 Bjorn Helgaas <helgaas@kernel.org> - 2015-10-22 20:50 +0200
  Re: [PATCH v11 4/6] PCI: hisi: Add PCIe host support for HiSilicon  SoC Hip05 Zhou Wang <wangzhou1@hisilicon.com> - 2015-10-26 09:30 +0100

csiph-web