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Re: [PATCH v2 2/2] net/fsl_pq_mdio: fix computed address for the TBI register

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From: Gerlando Falauto <gerlando.falauto@keymile.com>
Date: Mon, 12 Oct 2015 09:18:41 +0200

> commit afae5ad78b342f401c28b0bb1adb3cd494cb125a
>   "net/fsl_pq_mdio: streamline probing of MDIO nodes"
> 
> added support for different types of MDIO devices:
> 1) Gianfar MDIO nodes that only map the MII registers
> 2) Gianfar MDIO nodes that map the full MDIO register set
> 3) eTSEC2 MDIO nodes (which map the full MDIO register set)
> 4) QE MDIO nodes (which map only the MII registers)
> 
> However, the implementation for types 1 and 4 would mistakenly assume
> a mapping of the full MDIO register set, thereby computing the address
> for the TBI register starting from the containing structure.
> The TBI register would therefore be accessed at a wrong (much bigger)
> address, not giving the expected result at all.
> This patch restores the correct behavior we had prior to the above one.
> 
> The consequences of this bug are apparent when trying to access a PHY
> with the same address as the value contained in the initial value of
> the TBI register (normally 0); in that case you'll get answers from the
> internal TBI device (even though MDIO/MDC pins are actually *also*
> toggling on the physical bus!).
> Beware that you also need to add a fake tbi node to your device tree
> with an unused address.
> 
> Notice how this fix is related to commit
> 220669495bf8b68130a8218607147c7b74c28d2b
>   "powerpc: Add TBI PHY node to first MDIO bus"
> 
> which fixed the behavior in kernel 3.3, which was later broken by the
> above commit on kernel 3.7.
> 
> Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>

Applied.
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[PATCH v2 2/2] net/fsl_pq_mdio: fix computed address for the TBI register Gerlando Falauto <gerlando.falauto@keymile.com> - 2015-10-12 09:30 +0200
  Re: [PATCH v2 2/2] net/fsl_pq_mdio: fix computed address for the  TBI register David Miller <davem@davemloft.net> - 2015-10-13 13:20 +0200

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