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Re: [PATCH v6 05/17] drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range

From Krzysztof Kozlowski <k.kozlowski@samsung.com>
Newsgroups linux.kernel
Subject Re: [PATCH v6 05/17] drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range
Date 2015-10-12 06:20 +0200
Message-ID <qiCKB-4Ak-1@gated-at.bofh.it> (permalink)
References (2 earlier) <qizjI-7Uc-19@gated-at.bofh.it> <qizD4-8hR-3@gated-at.bofh.it> <qiBlv-2to-11@gated-at.bofh.it> <qiCrf-3YQ-1@gated-at.bofh.it> <qiCAV-4pg-7@gated-at.bofh.it>
Organization linux.* mail to news gateway

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On 12.10.2015 13:09, Yakir Yang wrote:
> 
> 
> On 10/12/2015 11:51 AM, Krzysztof Kozlowski wrote:
>> On 12.10.2015 11:43, Yakir Yang wrote:
>>> On 10/12/2015 08:49 AM, Krzysztof Kozlowski wrote:
>>>> On 12.10.2015 09:37, Yakir Yang wrote:
>>>>> Hi Krzysztof,
>>>>>
>>>>> On 10/10/2015 11:46 PM, Yakir Yang wrote:
>>>>>> Both hsync/vsync polarity and interlace mode can be parsed from
>>>>>> drm display mode, and dynamic_range and ycbcr_coeff can be judge
>>>>>> by the video code.
>>>>>>
>>>>>> But presumably Exynos still relies on the DT properties, so take
>>>>>> good use of mode_fixup() in to achieve the compatibility hacks.
>>>>>>
>>>>>> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
>>>>>> ---
>>>>>> Changes in v6: None
>>>>> +    of_property_read_u32(dp_node, "hsync-active-high",
>>>>> +                 &video->h_sync_polarity);
>>>>> +    of_property_read_u32(dp_node, "vsync-active-high",
>>>>> +                 &video->v_sync_polarity);
>>>>> +    of_property_read_u32(dp_node, "interlaced",
>>>>> +                 &video->interlaced);
>>>>> +}
>>>>>
>>>>>
>>>>> Sorry, forget to fix your previous comment here, would
>>>>> remember to fix it to v7 version, wish v6 would collect
>>>>> more comment/reviewed/ack.  :)
>>>> Right.
>>>>
>>>> You can send a v7 of only this patch.
>>>>
>>>> In the same time I would prefer not to chain-reply next version of
>>>> entire patchset to cover letter of previous version. It confuses me
>>>> because v6 appears UNDER v4 so I can't really find v6. I see v4 at the
>>>> top of my email list.
>>> Okay, I wish this chain-reply would make people easy to find the
>>> previous comments, but actually it is little mess now. I would give
>>> up this way to send patchset  :)
>>>
>>>> In the same time the patchset is quite big. Put the latest version
>>>> (with
>>>> this issue above fixed!) on some repo and link it in cover letter.
>>> Yeah, it's quite big now, I would like to back the patchset to previous
>>> format, like:
>>>
>>> ---> [PATCH v6 00/17] Cover letter
>>>    |----> [PATCH v6 01/17]
>>>    |----> [PATCH ......]
>>>    |----> [PATCH v6 05/17]
>>>       |----> [PATCH v7 05/17]
>>>    |----> [PATCH ......]
>>>    |----> [PATCH v6 17/17]
>>>
>>> Is it right, and can resend the v6 to fix this chain-reply issue with
>>> RESEND flag ([PATCH RESEND v6 ...]) ?
>>>
>>> ---> [PATCH RESEND v6 00/17] Cover letter
>>>    |----> [PATCH RESEND v6 01/17]
>>>    |----> [PATCH ......]
>>>    |----> [PATCH RESEND v6 05/17]
>>>       |----> [PATCH v7 05/17]
>>>    |----> [PATCH ......]
>>>    |----> [PATCH RESEND v6 17/17]
>>>
>> No, don't resend everything. I mean in this case with such big patchset
>> if you want to fix one patch just send one email [PATCH v7 05/17]
>> chained to proper id (cover letter or v6-05/17). Add a short note that
>> this is resend of only one patch from the set.
> 
> Oh, understand now, just keep this chain-reply no changes for now.
> 
> ----> [PATCH v4 00/16] Cover letter
>    |----> [PATCH v5 00/17] Covert letter
>    |----> [PATCH ......]
>    |
>    |----> [PATCH v6 00/17] Covert letter
>    |----> [PATCH v6 01/17]
>    |----> [PATCH ......]
>    |----> [PATCH v6 17/17]
>    |----> [PATCH v7 05/17]

Yes, I think it is correct. Maybe just add a note (in patch changelog)
that this is v7 of only fifth patch.

Best regards,
Krzysztof

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Thread

[PATCH v6 0/17] Add Analogix Core Display Port Driver Yakir Yang <ykk@rock-chips.com> - 2015-10-10 17:40 +0200
  [PATCH v6 01/17] drm: exynos: dp: convert to drm bridge mode Yakir Yang <ykk@rock-chips.com> - 2015-10-10 17:40 +0200
  [PATCH v6 03/17] drm: bridge: analogix/dp: fix some obvious code style Yakir Yang <ykk@rock-chips.com> - 2015-10-10 17:50 +0200
  [PATCH v6 06/17] Documentation: drm/bridge: add document for analogix_dp Yakir Yang <ykk@rock-chips.com> - 2015-10-10 17:50 +0200
  [PATCH v6 05/17] drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range Yakir Yang <ykk@rock-chips.com> - 2015-10-10 17:50 +0200
    Re: [PATCH v6 05/17] drm: bridge: analogix/dp: dynamic parse sync_pol  & interlace & dynamic_range Yakir Yang <ykk@rock-chips.com> - 2015-10-12 02:40 +0200
      Re: [PATCH v6 05/17] drm: bridge: analogix/dp: dynamic parse sync_pol  & interlace & dynamic_range Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2015-10-12 03:00 +0200
        Re: [PATCH v6 05/17] drm: bridge: analogix/dp: dynamic parse sync_pol  & interlace & dynamic_range Yakir Yang <ykk@rock-chips.com> - 2015-10-12 04:50 +0200
          Re: [PATCH v6 05/17] drm: bridge: analogix/dp: dynamic parse sync_pol  & interlace & dynamic_range Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2015-10-12 06:00 +0200
            Re: [PATCH v6 05/17] drm: bridge: analogix/dp: dynamic parse sync_pol  & interlace & dynamic_range Yakir Yang <ykk@rock-chips.com> - 2015-10-12 06:10 +0200
              Re: [PATCH v6 05/17] drm: bridge: analogix/dp: dynamic parse sync_pol  & interlace & dynamic_range Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2015-10-12 06:20 +0200
  [PATCH v6 07/17] ARM: dts: exynos/dp: remove some properties that deprecated by analogix_dp driver Yakir Yang <ykk@rock-chips.com> - 2015-10-10 18:00 +0200
  [PATCH v6 08/17] drm: rockchip: dp: add rockchip platform dp driver Yakir Yang <ykk@rock-chips.com> - 2015-10-10 18:00 +0200
  [PATCH v6 09/17] Documentation: drm/bridge: add document for analogix_dp Yakir Yang <ykk@rock-chips.com> - 2015-10-10 18:00 +0200
  [PATCH v6 10/17] phy: Add driver for rockchip Display Port PHY Yakir Yang <ykk@rock-chips.com> - 2015-10-10 18:00 +0200
    Re: [PATCH v6 10/17] phy: Add driver for rockchip Display Port PHY Kishon Vijay Abraham I <kishon@ti.com> - 2015-10-12 17:10 +0200
      Re: [PATCH v6 10/17] phy: Add driver for rockchip Display Port PHY Heiko Stübner <heiko@sntech.de> - 2015-10-12 18:20 +0200
      Re: [PATCH v6 10/17] phy: Add driver for rockchip Display Port PHY Yakir Yang <ykk@rock-chips.com> - 2015-10-13 03:30 +0200
  [PATCH v6 17/17] drm: bridge: analogix/dp: add edid modes parse in get_modes method Yakir Yang <ykk@rock-chips.com> - 2015-10-10 18:10 +0200
  [PATCH v6 14/17] drm: bridge: analogix/dp: add max link rate and lane count limit for RK3288 Yakir Yang <ykk@rock-chips.com> - 2015-10-10 18:10 +0200
  [PATCH v6 16/17] drm: bridge: analogix/dp: move hpd detect to connector detect function Yakir Yang <ykk@rock-chips.com> - 2015-10-10 18:10 +0200
  [PATCH v6 11/17] Documentation: phy: add document for rockchip dp phy Yakir Yang <ykk@rock-chips.com> - 2015-10-10 18:10 +0200
    Re: [PATCH v6 11/17] Documentation: phy: add document for rockchip dp  phy Kishon Vijay Abraham I <kishon@ti.com> - 2015-10-13 00:30 +0200
      Re: [PATCH v6 11/17] Documentation: phy: add document for rockchip  dp phy Yakir Yang <ykk@rock-chips.com> - 2015-10-13 03:30 +0200
  [PATCH v6 12/17] drm: rockchip: vop: add bpc and color mode setting Yakir Yang <ykk@rock-chips.com> - 2015-10-10 18:10 +0200
  [PATCH v6 13/17] drm: bridge: analogix/dp: add some rk3288 special registers setting Yakir Yang <ykk@rock-chips.com> - 2015-10-10 18:10 +0200
  [PATCH v6 04/17] drm: bridge: analogix/dp: remove duplicate configuration of link rate and link count Yakir Yang <ykk@rock-chips.com> - 2015-10-10 18:10 +0200
  [PATCH v6 15/17] drm: bridge: analogix/dp: try force hpd after plug in lookup failed Yakir Yang <ykk@rock-chips.com> - 2015-10-10 18:10 +0200
  [PATCH v7 05/17] drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range Yakir Yang <ykk@rock-chips.com> - 2015-10-12 06:40 +0200
    Re: [PATCH v7 05/17] drm: bridge: analogix/dp: dynamic parse sync_pol  & interlace & dynamic_range Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2015-10-12 09:00 +0200
      Re: [PATCH v7 05/17] drm: bridge: analogix/dp: dynamic parse sync_pol  & interlace & dynamic_range Yakir Yang <ykk@rock-chips.com> - 2015-10-12 09:30 +0200

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