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Groups > linux.kernel > #1239971
| From | Arnaldo Carvalho de Melo <acme@kernel.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH 12/16] perf tests: Add Intel CQM test |
| Date | 2015-10-05 23:10 +0200 |
| Message-ID | <qglbd-2cb-53@gated-at.bofh.it> (permalink) |
| References | <qglbb-2cb-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
From: Matt Fleming <matt.fleming@intel.com>
Peter reports that it's possible to trigger a WARN_ON_ONCE() in the
Intel CQM code by combining a hardware event and an Intel CQM
(software) event into a group. Unfortunately, the perf tools are not
able to create this bundle and we need to manually construct a test
case.
For posterity, record Peter's proof of concept test case in tools/perf
so that it presents a model for how we can perform architecture
specific tests, or "arch tests", in perf in the future.
The particular issue triggered in the test case is that when the
counter for the hardware event overflows and triggers a PMI we'll read
both the hardware event and the software event counters.
Unfortunately, for CQM that involves performing an IPI to read the CQM
event counters on all sockets, which in NMI context triggers the
WARN_ON_ONCE().
Reported-by: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Matt Fleming <matt.fleming@intel.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Kanaka Juvva <kanaka.d.juvva@intel.com>
Cc: Vikas Shivappa <vikas.shivappa@intel.com>
Cc: Vince Weaver <vince@deater.net>
Link: http://lkml.kernel.org/r/1437490509-15373-1-git-send-email-matt@codeblueprint.co.uk
Link: http://lkml.kernel.org/n/tip-3p4ra0u8vzm7m289a1m799kf@git.kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
---
tools/perf/arch/x86/include/arch-tests.h | 1 +
tools/perf/arch/x86/tests/Build | 1 +
tools/perf/arch/x86/tests/arch-tests.c | 4 +
tools/perf/arch/x86/tests/intel-cqm.c | 124 +++++++++++++++++++++++++++++++
4 files changed, 130 insertions(+)
create mode 100644 tools/perf/arch/x86/tests/intel-cqm.c
diff --git a/tools/perf/arch/x86/include/arch-tests.h b/tools/perf/arch/x86/include/arch-tests.h
index 5927cf224325..7ed00f4b0908 100644
--- a/tools/perf/arch/x86/include/arch-tests.h
+++ b/tools/perf/arch/x86/include/arch-tests.h
@@ -5,6 +5,7 @@
int test__rdpmc(void);
int test__perf_time_to_tsc(void);
int test__insn_x86(void);
+int test__intel_cqm_count_nmi_context(void);
#ifdef HAVE_DWARF_UNWIND_SUPPORT
struct thread;
diff --git a/tools/perf/arch/x86/tests/Build b/tools/perf/arch/x86/tests/Build
index 8e2c5a38c3b9..cbb7e978166b 100644
--- a/tools/perf/arch/x86/tests/Build
+++ b/tools/perf/arch/x86/tests/Build
@@ -5,3 +5,4 @@ libperf-y += arch-tests.o
libperf-y += rdpmc.o
libperf-y += perf-time-to-tsc.o
libperf-$(CONFIG_AUXTRACE) += insn-x86.o
+libperf-y += intel-cqm.o
diff --git a/tools/perf/arch/x86/tests/arch-tests.c b/tools/perf/arch/x86/tests/arch-tests.c
index d116c217af99..2218cb64f840 100644
--- a/tools/perf/arch/x86/tests/arch-tests.c
+++ b/tools/perf/arch/x86/tests/arch-tests.c
@@ -24,6 +24,10 @@ struct test arch_tests[] = {
},
#endif
{
+ .desc = "Test intel cqm nmi context read",
+ .func = test__intel_cqm_count_nmi_context,
+ },
+ {
.func = NULL,
},
diff --git a/tools/perf/arch/x86/tests/intel-cqm.c b/tools/perf/arch/x86/tests/intel-cqm.c
new file mode 100644
index 000000000000..d28c1b6a3b54
--- /dev/null
+++ b/tools/perf/arch/x86/tests/intel-cqm.c
@@ -0,0 +1,124 @@
+#include "tests/tests.h"
+#include "perf.h"
+#include "cloexec.h"
+#include "debug.h"
+#include "evlist.h"
+#include "evsel.h"
+#include "arch-tests.h"
+
+#include <sys/mman.h>
+#include <string.h>
+
+static pid_t spawn(void)
+{
+ pid_t pid;
+
+ pid = fork();
+ if (pid)
+ return pid;
+
+ while(1);
+ sleep(5);
+ return 0;
+}
+
+/*
+ * Create an event group that contains both a sampled hardware
+ * (cpu-cycles) and software (intel_cqm/llc_occupancy/) event. We then
+ * wait for the hardware perf counter to overflow and generate a PMI,
+ * which triggers an event read for both of the events in the group.
+ *
+ * Since reading Intel CQM event counters requires sending SMP IPIs, the
+ * CQM pmu needs to handle the above situation gracefully, and return
+ * the last read counter value to avoid triggering a WARN_ON_ONCE() in
+ * smp_call_function_many() caused by sending IPIs from NMI context.
+ */
+int test__intel_cqm_count_nmi_context(void)
+{
+ struct perf_evlist *evlist = NULL;
+ struct perf_evsel *evsel = NULL;
+ struct perf_event_attr pe;
+ int i, fd[2], flag, ret;
+ size_t mmap_len;
+ void *event;
+ pid_t pid;
+ int err = TEST_FAIL;
+
+ flag = perf_event_open_cloexec_flag();
+
+ evlist = perf_evlist__new();
+ if (!evlist) {
+ pr_debug("perf_evlist__new failed\n");
+ return TEST_FAIL;
+ }
+
+ ret = parse_events(evlist, "intel_cqm/llc_occupancy/", NULL);
+ if (ret) {
+ pr_debug("parse_events failed\n");
+ err = TEST_SKIP;
+ goto out;
+ }
+
+ evsel = perf_evlist__first(evlist);
+ if (!evsel) {
+ pr_debug("perf_evlist__first failed\n");
+ goto out;
+ }
+
+ memset(&pe, 0, sizeof(pe));
+ pe.size = sizeof(pe);
+
+ pe.type = PERF_TYPE_HARDWARE;
+ pe.config = PERF_COUNT_HW_CPU_CYCLES;
+ pe.read_format = PERF_FORMAT_GROUP;
+
+ pe.sample_period = 128;
+ pe.sample_type = PERF_SAMPLE_IP | PERF_SAMPLE_READ;
+
+ pid = spawn();
+
+ fd[0] = sys_perf_event_open(&pe, pid, -1, -1, flag);
+ if (fd[0] < 0) {
+ pr_debug("failed to open event\n");
+ goto out;
+ }
+
+ memset(&pe, 0, sizeof(pe));
+ pe.size = sizeof(pe);
+
+ pe.type = evsel->attr.type;
+ pe.config = evsel->attr.config;
+
+ fd[1] = sys_perf_event_open(&pe, pid, -1, fd[0], flag);
+ if (fd[1] < 0) {
+ pr_debug("failed to open event\n");
+ goto out;
+ }
+
+ /*
+ * Pick a power-of-two number of pages + 1 for the meta-data
+ * page (struct perf_event_mmap_page). See tools/perf/design.txt.
+ */
+ mmap_len = page_size * 65;
+
+ event = mmap(NULL, mmap_len, PROT_READ, MAP_SHARED, fd[0], 0);
+ if (event == (void *)(-1)) {
+ pr_debug("failed to mmap %d\n", errno);
+ goto out;
+ }
+
+ sleep(1);
+
+ err = TEST_OK;
+
+ munmap(event, mmap_len);
+
+ for (i = 0; i < 2; i++)
+ close(fd[i]);
+
+ kill(pid, SIGKILL);
+ wait(NULL);
+out:
+ perf_evlist__delete(evlist);
+ return err;
+}
--
2.1.0
--
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[GIT PULL 00/16] perf/core improvements and fixes Arnaldo Carvalho de Melo <acme@kernel.org> - 2015-10-05 23:10 +0200
[PATCH 01/16] tools lib api fs: No need to use PATH_MAX + 1 Arnaldo Carvalho de Melo <acme@kernel.org> - 2015-10-05 23:10 +0200
[PATCH 05/16] perf tools: Introduce 'P' modifier to request max precision Arnaldo Carvalho de Melo <acme@kernel.org> - 2015-10-05 23:10 +0200
[PATCH 08/16] perf tools: Setup proper width for symbol_iaddr field Arnaldo Carvalho de Melo <acme@kernel.org> - 2015-10-05 23:10 +0200
[PATCH 13/16] perf callchain: Switch default to 'graph,0.5,caller' Arnaldo Carvalho de Melo <acme@kernel.org> - 2015-10-05 23:10 +0200
Re: [PATCH 13/16] perf callchain: Switch default to 'graph,0.5,caller' Brendan Gregg <brendan.d.gregg@gmail.com> - 2015-10-09 22:40 +0200
Re: [PATCH 13/16] perf callchain: Switch default to 'graph,0.5,caller' Arnaldo Carvalho de Melo <acme@kernel.org> - 2015-10-10 00:00 +0200
Re: [PATCH 13/16] perf callchain: Switch default to 'graph,0.5,caller' Brendan Gregg <brendan.d.gregg@gmail.com> - 2015-10-10 00:20 +0200
Re: [PATCH 13/16] perf callchain: Switch default to 'graph,0.5,caller' Arnaldo Carvalho de Melo <arnaldo.melo@gmail.com> - 2015-10-10 00:30 +0200
Re: [PATCH 13/16] perf callchain: Switch default to 'graph,0.5,caller' Ingo Molnar <mingo@kernel.org> - 2015-10-10 09:10 +0200
Re: [PATCH 13/16] perf callchain: Switch default to 'graph,0.5,caller' Brendan Gregg <brendan.d.gregg@gmail.com> - 2015-10-10 09:40 +0200
Re: [PATCH 13/16] perf callchain: Switch default to 'graph,0.5,caller' Ingo Molnar <mingo@kernel.org> - 2015-10-10 11:10 +0200
Re: [PATCH 13/16] perf callchain: Switch default to 'graph,0.5,caller' Frederic Weisbecker <fweisbec@gmail.com> - 2015-10-12 17:30 +0200
Re: [PATCH 13/16] perf callchain: Switch default to 'graph,0.5,caller' Namhyung Kim <namhyung@kernel.org> - 2015-10-13 06:50 +0200
[PATCH 04/16] perf tools: Export perf_event_attr__set_max_precise_ip() Arnaldo Carvalho de Melo <acme@kernel.org> - 2015-10-05 23:10 +0200
[PATCH 10/16] perf tests: Add arch tests Arnaldo Carvalho de Melo <acme@kernel.org> - 2015-10-05 23:10 +0200
[PATCH 09/16] perf tools: Handle -h and -v options Arnaldo Carvalho de Melo <acme@kernel.org> - 2015-10-05 23:10 +0200
[PATCH 07/16] perf tools: Add support for sorting on the iaddr Arnaldo Carvalho de Melo <acme@kernel.org> - 2015-10-05 23:10 +0200
[PATCH 12/16] perf tests: Add Intel CQM test Arnaldo Carvalho de Melo <acme@kernel.org> - 2015-10-05 23:10 +0200
Re: [GIT PULL 00/16] perf/core improvements and fixes Ingo Molnar <mingo@kernel.org> - 2015-10-06 09:10 +0200
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