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Groups > linux.kernel > #1296587
| From | "Wu, Feng" <feng.wu@intel.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | RE: [PATCH v2 1/2] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts |
| Date | 2015-12-22 08:20 +0100 |
| Message-ID | <qIpoJ-Py-9@gated-at.bofh.it> (permalink) |
| References | (4 earlier) <qHY5c-k9-1@gated-at.bofh.it> <qImTT-7BR-5@gated-at.bofh.it> <qIoVI-qe-9@gated-at.bofh.it> <qIp5o-ty-17@gated-at.bofh.it> <qIpoJ-Py-11@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Hi Radim/Paolo,
> -----Original Message-----
> From: Yang Zhang [mailto:yang.zhang.wz@gmail.com]
> Sent: Tuesday, December 22, 2015 3:14 PM
> To: Wu, Feng <feng.wu@intel.com>; pbonzini@redhat.com;
> rkrcmar@redhat.com
> Cc: kvm@vger.kernel.org; linux-kernel@vger.kernel.org; Jiang Liu
> (jiang.liu@linux.intel.com) <jiang.liu@linux.intel.com>
> Subject: Re: [PATCH v2 1/2] KVM: x86: Use vector-hashing to deliver lowest-
> priority interrupts
>
> On 2015/12/22 14:59, Wu, Feng wrote:
> >
> >
> >> -----Original Message-----
> >> From: Yang Zhang [mailto:yang.zhang.wz@gmail.com]
> >> Sent: Tuesday, December 22, 2015 2:49 PM
> >> To: Wu, Feng <feng.wu@intel.com>; pbonzini@redhat.com;
> >> rkrcmar@redhat.com
> >> Cc: kvm@vger.kernel.org; linux-kernel@vger.kernel.org; Jiang Liu
> >> (jiang.liu@linux.intel.com) <jiang.liu@linux.intel.com>
> >> Subject: Re: [PATCH v2 1/2] KVM: x86: Use vector-hashing to deliver lowest-
> >> priority interrupts
> >>
> >>>>>>
> >>>>>> On 2015/12/16 9:37, Feng Wu wrote:
> >>>>>>> Use vector-hashing to deliver lowest-priority interrupts, As an
> >>>>>>> example, modern Intel CPUs in server platform use this method to
> >>>>>>> handle lowest-priority interrupts.
> >>>>>>>
> >>>>>>> Signed-off-by: Feng Wu <feng.wu@intel.com>
> >>>>>>> ---
> >>>>>>> arch/x86/kvm/irq_comm.c | 27 ++++++++++++++++++-----
> >>>>>>> arch/x86/kvm/lapic.c | 57
> >>>>>> ++++++++++++++++++++++++++++++++++++++++---------
> >>>>>>> arch/x86/kvm/lapic.h | 2 ++
> >>>>>>> arch/x86/kvm/x86.c | 9 ++++++++
> >>>>>>> arch/x86/kvm/x86.h | 1 +
> >>>>>>> 5 files changed, 81 insertions(+), 15 deletions(-)
> >>>>>>>
> >>>>>>> bool kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct
> kvm_lapic
> >>>> *src,
> >>>>>>> struct kvm_lapic_irq *irq, int *r, unsigned long
> >> *dest_map)
> >>>>>>> {
> >>>>>>> @@ -731,17 +747,38 @@ bool kvm_irq_delivery_to_apic_fast(struct
> kvm
> >>>>>> *kvm, struct kvm_lapic *src,
> >>>>>>> dst = map->logical_map[cid];
> >>>>>>>
> >>>>>>> if (kvm_lowest_prio_delivery(irq)) {
> >>>>>>> - int l = -1;
> >>>>>>> - for_each_set_bit(i, &bitmap, 16) {
> >>>>>>> - if (!dst[i])
> >>>>>>> - continue;
> >>>>>>> - if (l < 0)
> >>>>>>> - l = i;
> >>>>>>> - else if (kvm_apic_compare_prio(dst[i]-
> >vcpu,
> >>>>>> dst[l]->vcpu) < 0)
> >>>>>>> - l = i;
> >>>>>>> + if (!kvm_vector_hashing_enabled()) {
> >>>>>>> + int l = -1;
> >>>>>>> + for_each_set_bit(i, &bitmap, 16) {
> >>>>>>> + if (!dst[i])
> >>>>>>> + continue;
> >>>>>>> + if (l < 0)
> >>>>>>> + l = i;
> >>>>>>> + else if
> (kvm_apic_compare_prio(dst[i]-
> >>>>>>> vcpu, dst[l]->vcpu) < 0)
> >>>>>>> + l = i;
> >>>>>>> + }
> >>>>>>> + bitmap = (l >= 0) ? 1 << l : 0;
> >>>>>>> + } else {
> >>>>>>> + int idx = 0;
> >>>>>>> + unsigned int dest_vcpus = 0;
> >>>>>>> +
> >>>>>>> + for_each_set_bit(i, &bitmap, 16) {
> >>>>>>> + if (!dst[i]
> >>>>>> && !kvm_lapic_enabled(dst[i]->vcpu)) {
> >>>>>>
> >>>>>> It should be or(||) not and (&&).
> >>>>>
> >>>>> Oh, you are right! My negligence! Thanks for pointing this out, Yang!
> >>>>
> >>>> btw, i think the kvm_lapic_enabled check is wrong here? Why need it here?
> >>>
> >>> If the lapic is not enabled, I think we cannot recognize it as a candidate, can
> >> we?
> >>> Maybe Radim can confirm this, Radim, what is your option?
> >>
> >> Lapic can be disable by hw or sw. Here we only need to check the hw is
> >> enough which is already covered while injecting the interrupt into
> >> guest. I remember we(Glab, Macelo and me) have discussed it several ago,
> >> but i cannot find the mail thread.
> >
> > But if the lapic is disabled by software, we cannot still inject interrupts to
> > it, can we?
>
> Yes, We cannot inject the normal interrupt. But this already covered by
> current logic and add a check here seems meaningless. Conversely, it may
> do bad thing..
>
Let's wait for Radim/Paolo's opinions about this.
Thanks,
Feng
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[PATCH v2 0/2] Add vector-hashing support for lowest-priority interrupts delivery Feng Wu <feng.wu@intel.com> - 2015-12-16 03:00 +0100
[PATCH v2 2/2] KVM: x86: Add lowest-priority support for vt-d posted-interrupts Feng Wu <feng.wu@intel.com> - 2015-12-16 03:00 +0100
RE: [PATCH v2 2/2] KVM: x86: Add lowest-priority support for vt-d posted-interrupts "Wu, Feng" <feng.wu@intel.com> - 2015-12-21 03:00 +0100
Re: [PATCH v2 2/2] KVM: x86: Add lowest-priority support for vt-d posted-interrupts Yang Zhang <yang.zhang.wz@gmail.com> - 2015-12-21 03:10 +0100
RE: [PATCH v2 2/2] KVM: x86: Add lowest-priority support for vt-d posted-interrupts "Wu, Feng" <feng.wu@intel.com> - 2015-12-22 05:40 +0100
Re: [PATCH v2 2/2] KVM: x86: Add lowest-priority support for vt-d posted-interrupts Yang Zhang <yang.zhang.wz@gmail.com> - 2015-12-22 07:50 +0100
Re: [PATCH v2 2/2] KVM: x86: Add lowest-priority support for vt-d posted-interrupts "rkrcmar@redhat.com" <rkrcmar@redhat.com> - 2015-12-23 18:00 +0100
Re: [PATCH v2 2/2] KVM: x86: Add lowest-priority support for vt-d posted-interrupts Yang Zhang <yang.zhang.wz@gmail.com> - 2015-12-21 03:00 +0100
Re: [PATCH v2 2/2] KVM: x86: Add lowest-priority support for vt-d posted-interrupts Radim Krčmář <rkrcmar@redhat.com> - 2015-12-23 18:30 +0100
[PATCH v2 1/2] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts Feng Wu <feng.wu@intel.com> - 2015-12-16 03:00 +0100
Re: [PATCH v2 1/2] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts Yang Zhang <yang.zhang.wz@gmail.com> - 2015-12-21 02:50 +0100
RE: [PATCH v2 1/2] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts "Wu, Feng" <feng.wu@intel.com> - 2015-12-21 03:00 +0100
Re: [PATCH v2 1/2] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts Yang Zhang <yang.zhang.wz@gmail.com> - 2015-12-21 03:10 +0100
RE: [PATCH v2 1/2] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts "Wu, Feng" <feng.wu@intel.com> - 2015-12-22 05:40 +0100
Re: [PATCH v2 1/2] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts Yang Zhang <yang.zhang.wz@gmail.com> - 2015-12-22 07:50 +0100
RE: [PATCH v2 1/2] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts "Wu, Feng" <feng.wu@intel.com> - 2015-12-22 08:00 +0100
RE: [PATCH v2 1/2] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts "Wu, Feng" <feng.wu@intel.com> - 2015-12-22 08:20 +0100
Re: [PATCH v2 1/2] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts "rkrcmar@redhat.com" <rkrcmar@redhat.com> - 2015-12-22 21:00 +0100
RE: [PATCH v2 1/2] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts "Wu, Feng" <feng.wu@intel.com> - 2015-12-23 03:20 +0100
Re: [PATCH v2 1/2] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts "rkrcmar@redhat.com" <rkrcmar@redhat.com> - 2015-12-23 17:50 +0100
Re: [PATCH v2 1/2] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts Yang Zhang <yang.zhang.wz@gmail.com> - 2015-12-23 04:20 +0100
Re: [PATCH v2 1/2] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts Yang Zhang <yang.zhang.wz@gmail.com> - 2015-12-22 08:20 +0100
Re: [PATCH v2 1/2] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts Radim Krčmář <rkrcmar@redhat.com> - 2015-12-23 18:20 +0100
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