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Re: [PATCH v5 1/4] clk: sunxi: Add H3 clocks support

From Maxime Ripard <maxime.ripard@free-electrons.com>
Newsgroups linux.kernel
Subject Re: [PATCH v5 1/4] clk: sunxi: Add H3 clocks support
Date 2015-12-08 09:20 +0100
Message-ID <qDlF8-8d1-9@gated-at.bofh.it> (permalink)
References <qC65r-851-5@gated-at.bofh.it> <qC65r-851-3@gated-at.bofh.it>
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Hi Jens,

On Fri, Dec 04, 2015 at 10:24:40PM +0100, Jens Kuske wrote:
> The H3 clock control unit is similar to the those of other sun8i family
> members like the A23.
> 
> It adds a new bus gates clock similar to the simple gates, but with a
> different parent clock for each single gate.
> Some of the gates use the new AHB2 clock as parent, whose clock source
> is muxable between AHB1 and PLL6/2. The documentation isn't totally clear
> about which devices belong to AHB2 now, especially USB EHIC/OHIC, so it
> is mostly based on Allwinner kernel source code.
> 
> Signed-off-by: Jens Kuske <jenskuske@gmail.com>

Applied, thanks!

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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Thread

[PATCH v5 1/4] clk: sunxi: Add H3 clocks support Jens Kuske <jenskuske@gmail.com> - 2015-12-04 22:30 +0100
  Re: [PATCH v5 1/4] clk: sunxi: Add H3 clocks support Rob Herring <robh@kernel.org> - 2015-12-06 02:00 +0100
  Re: [PATCH v5 1/4] clk: sunxi: Add H3 clocks support Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-12-08 09:20 +0100

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